HAL heuristic produces explicit layouts for bivariate bicycle, tile, radial, and Tanner qLDPC codes on multilayer superconducting hardware, demonstrating that open-boundary designs reduce hardware demands with only moderate loss in logical efficiency.
A simple universal routing strategy for reducing the connectivity requirements of quantum ldpc codes
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The [[144,12,12]] bivariate bicycle code is distributed across 4 to 12 processors in a star network, with simulations showing logical error rates under varying nonlocal noise scaling.
A programmable 2D toric oscillator network enables efficient routing for bivariate bicycle LDPC codes, reducing long-range couplers to O(sqrt(n)) and achieving 3.06% logical error rate per cycle in simulations for the [[18,4,4]] code.
citing papers explorer
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Placing and routing quantum LDPC codes in multilayer superconducting hardware
HAL heuristic produces explicit layouts for bivariate bicycle, tile, radial, and Tanner qLDPC codes on multilayer superconducting hardware, demonstrating that open-boundary designs reduce hardware demands with only moderate loss in logical efficiency.
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Distributed Quantum Error Correction with Bivariate Bicycle Codes in a Modular Architecture
The [[144,12,12]] bivariate bicycle code is distributed across 4 to 12 processors in a star network, with simulations showing logical error rates under varying nonlocal noise scaling.
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Efficient Routing of Quantum LDPC Codes on Programmable 2D Toric Architectures
A programmable 2D toric oscillator network enables efficient routing for bivariate bicycle LDPC codes, reducing long-range couplers to O(sqrt(n)) and achieving 3.06% logical error rate per cycle in simulations for the [[18,4,4]] code.