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arxiv: 2605.04663 · v1 · submitted 2026-05-06 · 🪐 quant-ph

Recognition: unknown

Distributed Quantum Error Correction with Bivariate Bicycle Codes in a Modular Architecture

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Pith reviewed 2026-05-08 17:39 UTC · model grok-4.3

classification 🪐 quant-ph
keywords bivariate bicycle codesdistributed quantum error correctionmodular architecturesqLDPC codeslogical error ratesstar networkBP+OSD decodingcircuit-level noise
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The pith

Bivariate bicycle codes can be distributed across multiple quantum processors connected by Bell pairs while keeping logical error rates manageable under a nonlocal noise scaling factor.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper shows how to partition the qubits of the [[144,12,12]] bivariate bicycle code across 4, 6, or 12 processors in a star network so that local gates run inside each processor and nonlocal gates use shared entanglement. Simulations under circuit-level noise track how logical error rates and pseudo-thresholds change with the number of processors and with a factor that multiplies the cost of those nonlocal operations. A reader cares because these high-rate qLDPC codes outperform surface codes in encoding density, yet their long-range stabilizers are hard to build on single chips; modular hardware could make them usable. If the results hold, modular systems could support fault-tolerant computation without requiring one giant fully connected device.

Core claim

We partition the qubits of the [[144,12,12]] BB code across 4, 6, and 12 quantum processors and analyze the resulting logical error rates and pseudo-threshold performance under circuit level noise by varying the number of processors and a scaling factor that captures the additional noise associated with nonlocal operations. We use Monte Carlo simulations with BP+OSD decoding and extend the previously known BB code ansatz to the distributed setting.

What carries the argument

The star network that links processors via shared Bell pairs for inter-processor gates, combined with qubit partitioning of the bivariate bicycle code and BP+OSD decoding.

If this is right

  • Logical error rates rise with more processors but stay below physical rates for moderate scaling factors on nonlocal gates.
  • Pseudo-thresholds give a practical benchmark for when the distributed code still improves over raw physical qubits.
  • All-to-all connectivity inside each processor allows the full set of local stabilizer measurements without extra cost.
  • The results supply concrete design rules for choosing how many processors to use for a given noise budget.
  • The same partitioning and scaling approach applies to other qLDPC codes in modular hardware.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Platforms that already support all-to-all gates locally, such as trapped ions or neutral atoms, become especially attractive for high-rate codes.
  • Better partitions that reduce the number of crossing stabilizers could lower the required scaling factor and raise thresholds.
  • Real entanglement distribution hardware can be tested against the scaling model to check whether unaccounted network noise appears.
  • The modular route may let quantum computers grow by adding processors rather than by enlarging single chips.

Load-bearing premise

The extra noise from nonlocal operations can be captured by a single scaling factor and the star network introduces no other unmodeled errors.

What would settle it

Hardware runs or refined simulations in which logical error rates rise faster than predicted or pseudo-thresholds disappear entirely once the number of processors reaches 12 or the nonlocal scaling factor exceeds the values tested.

Figures

Figures reproduced from arXiv: 2605.04663 by Eneet Kaur, Kaushik P. Seshadreesan, Nitish Kumar Chandra, Reza Nejabati.

Figure 1
Figure 1. Figure 1: Depth-8 syndrome measurement cycle circuit. view at source ↗
Figure 2
Figure 2. Figure 2: Remote CNOT between QPU A and QPU B using a shared Bell pair. view at source ↗
Figure 3
Figure 3. Figure 3: QPU partitioning of the [ [144, 12, 12] ] bivariate bicycle code for 𝑁QPU = 6. The 12 𝑥-columns are divided into six blocks of width 𝑐 = 2, and the highlighted cell (5, 2) lies in QPU 2. The markers show the qubit types 𝐿, 𝑋, 𝑍, and 𝑅. The overlaid blue and red edges show the 𝑋- and 𝑍-check connectivity of the highlighted cell, respectively, as defined in Eqs. (7) and (11). Edges within QPU 2 are local, wh… view at source ↗
Figure 4
Figure 4. Figure 4: Star network architecture in which multiple QPUs (6) are connected view at source ↗
Figure 5
Figure 5. Figure 5: BB144 threshold fitting with quadratic alpha dependence. Logical view at source ↗
Figure 7
Figure 7. Figure 7: shows the quadratic 𝛼 dependent fits for the BB144 code distributed across 4 QPUs. As 𝛼 increases, the curves shift upward and cross 𝑝𝐿 = 12𝑝 at smaller 𝑝, reducing the pseudo threshold from 0.006276 to 0.002313. Table V lists the evaluated coefficient functions 𝑐0 (𝛼), 𝑐1 (𝛼), and 𝑐2 (𝛼) for the fitted ansatz, while Table VI summarizes TABLE III Evaluated values of the coefficient functions 𝑐0 (𝛼), 𝑐1 (𝛼)… view at source ↗
Figure 8
Figure 8. Figure 8: Comparison of the extracted pseudo threshold view at source ↗
read the original abstract

Quantum low density parity check (qLDPC) codes, particularly bivariate bicycle (BB) codes, achieve competitive fault tolerance thresholds while offering substantially higher encoding rates than planar surface codes. However, their intrinsically long-range stabilizer structure makes them difficult to implement on monolithic devices with nearest neighbor connectivity and limited qubit capacity. In this work, we study the realization of a BB code in a modular multiprocessor architecture, where quantum processors are interconnected through shared Bell pairs. We consider processors with all to all internal connectivity, which is feasible on trapped ion and neutral atom platforms, enabling flexible local gate execution while inter-processor (nonlocal) gates are mediated by shared entanglement. We describe a star network architecture that can realize this distributed setting. We partition the qubits of the [[144,12,12]] BB code across 4, 6, and 12 quantum processors and analyze the resulting logical error rates and pseudo-threshold performance under circuit level noise by varying the number of processors and a scaling factor that captures the additional noise associated with nonlocal operations. We use Monte Carlo simulations with BP+OSD decoding and extend the previously known BB code ansatz to the distributed setting. Our results provide architectural insight and design considerations for distributed BB codes in modular quantum computing architectures.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The manuscript studies a distributed implementation of the [[144,12,12]] bivariate bicycle (BB) qLDPC code in a modular architecture. Qubits are partitioned across 4, 6, or 12 processors connected by a star network that distributes shared Bell pairs; nonlocal gates are modeled by scaling local circuit-level noise rates by a tunable factor. Monte Carlo simulations with BP+OSD decoding are used to extract logical error rates and pseudo-thresholds as functions of processor count and the nonlocal scaling factor, with an extension of the BB code ansatz to the distributed setting.

Significance. If the noise model is shown to be representative, the results supply concrete architectural guidance for realizing high-rate qLDPC codes on modular platforms (trapped ions, neutral atoms) that already support all-to-all local connectivity. The empirical performance curves under varying processor counts and the explicit extension of the BB ansatz constitute a useful data point for the design of distributed fault-tolerant quantum processors.

major comments (2)
  1. [Abstract and circuit-level noise model description] The central performance claims rest on modeling all inter-processor effects (Bell-pair distribution, entanglement swapping, routing) solely by a uniform multiplicative scaling of local noise rates. This assumption is load-bearing for the reported logical error rates and pseudo-thresholds; if the star network introduces heralded loss, time-correlated errors, or new Pauli channels, the quantitative conclusions would change. The manuscript should either derive or simulate the effective noise model from the underlying entanglement-generation protocol rather than parameterizing it by a single free factor.
  2. [Distributed ansatz and decoding section] The extension of the BB code ansatz to the distributed setting (partitioning stabilizers across processors) is described only at a high level. It is unclear whether the resulting parity-check matrix remains sparse enough for BP+OSD to retain its reported performance, or whether additional decoding overheads arise from the nonlocal syndrome extraction. A concrete description of the modified Tanner graph or stabilizer generators after partitioning would be required to assess decoder optimality.
minor comments (2)
  1. [Simulation results] The manuscript does not report error bars on the Monte Carlo logical error rates or the precise number of shots used to estimate pseudo-thresholds; these details are needed to judge the statistical significance of the performance differences across processor counts.
  2. [Noise model] Notation for the nonlocal scaling factor is introduced without an explicit symbol or equation; a short definition (e.g., Eq. (X)) would improve clarity when the factor is varied in the figures.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for their thorough review and valuable feedback on our manuscript. We have carefully considered the major comments and revised the manuscript to address them where possible.

read point-by-point responses
  1. Referee: [Abstract and circuit-level noise model description] The central performance claims rest on modeling all inter-processor effects (Bell-pair distribution, entanglement swapping, routing) solely by a uniform multiplicative scaling of local noise rates. This assumption is load-bearing for the reported logical error rates and pseudo-thresholds; if the star network introduces heralded loss, time-correlated errors, or new Pauli channels, the quantitative conclusions would change. The manuscript should either derive or simulate the effective noise model from the underlying entanglement-generation protocol rather than parameterizing it by a single free factor.

    Authors: We acknowledge that our noise model relies on a simplified parameterization via a scaling factor for nonlocal operations. This choice allows us to explore a range of architectural scenarios without committing to a specific hardware implementation. In the revised manuscript, we have added a new subsection discussing the limitations of this model, including potential impacts from heralded losses, time-correlated errors, and additional Pauli channels. We also provide bounds on how deviations from the uniform scaling might affect the results. However, a full derivation from a specific entanglement-generation protocol is beyond the current scope, as it would require detailed assumptions about the physical layer that are not the focus of this work. We believe the current approach provides useful insights into the sensitivity to nonlocal noise. revision: partial

  2. Referee: [Distributed ansatz and decoding section] The extension of the BB code ansatz to the distributed setting (partitioning stabilizers across processors) is described only at a high level. It is unclear whether the resulting parity-check matrix remains sparse enough for BP+OSD to retain its reported performance, or whether additional decoding overheads arise from the nonlocal syndrome extraction. A concrete description of the modified Tanner graph or stabilizer generators after partitioning would be required to assess decoder optimality.

    Authors: We appreciate this comment and agree that more detail is needed. In the revised manuscript, we have expanded the description of the distributed ansatz in Section 3. We now include explicit examples of the stabilizer generators for each partitioning (4, 6, and 12 processors), the corresponding parity-check matrices, and confirm that the sparsity (maximum row and column weights) remains unchanged from the original BB code. We also describe the modified Tanner graph and note that the BP+OSD decoder performance is preserved because the graph structure retains its low-density properties. Regarding decoding overheads from nonlocal syndrome extraction, we have added analysis showing that the additional communication does not introduce significant latency in the decoding process under our assumptions. revision: yes

Circularity Check

0 steps flagged

No significant circularity; results from independent Monte Carlo simulations

full rationale

The paper performs Monte Carlo simulations of logical error rates and pseudo-thresholds for partitioned [[144,12,12]] BB codes under circuit-level noise, using BP+OSD decoding and a tunable scaling factor for nonlocal operations. No equations or claims reduce a prediction to a fitted input by construction, nor does any load-bearing step rely on self-citation chains or self-definitional ansatzes. The scaling factor is explicitly varied as a modeling parameter rather than derived, and the extension of the BB ansatz is presented as an adaptation for the distributed setting without circular reduction to prior outputs. The analysis is self-contained against external simulation benchmarks.

Axiom & Free-Parameter Ledger

1 free parameters · 2 axioms · 0 invented entities

The central claim rests on standard quantum computing assumptions and the introduced scaling factor for noise.

free parameters (1)
  • nonlocal noise scaling factor
    A parameter that captures additional noise from nonlocal operations, varied in simulations.
axioms (2)
  • domain assumption Circuit-level noise model applies to distributed gates via Bell pairs
    Assumed for the Monte Carlo simulations of logical error rates.
  • domain assumption BP+OSD decoder performs optimally in this setting
    Used for decoding in simulations.

pith-pipeline@v0.9.0 · 5532 in / 1216 out tokens · 47543 ms · 2026-05-08T17:39:12.176073+00:00 · methodology

discussion (0)

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Reference graph

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