Barbell codes are a family of qLDPC codes with a matching superconducting chip layout enabling constant hardware complexity, simulated to preserve logical information over trillions of QEC cycles at 10^{-4} physical noise with under 30 data qubits per logical qubit.
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UNVERDICTED 2representative citing papers
Full extractors for HGP codes are built to enable logical processing via PBC without compilation overhead, with sizes 50-80% of base codes and low error rates in simulations.
citing papers explorer
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Barbell Codes: qLDPC Codes for Superconducting Quantum Hardware
Barbell codes are a family of qLDPC codes with a matching superconducting chip layout enabling constant hardware complexity, simulated to preserve logical information over trillions of QEC cycles at 10^{-4} physical noise with under 30 data qubits per logical qubit.
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Full Extractors for Logical Processing in Hypergraph Product Codes
Full extractors for HGP codes are built to enable logical processing via PBC without compilation overhead, with sizes 50-80% of base codes and low error rates in simulations.