A new nearest-neighbor twist-defect braiding protocol implements the logical S gate in the surface code at 2d × d × d spacetime volume with logical error rates comparable to prior methods for d ≥ 5 near p = 10^{-3}.
Gidney, Stim: a fast stabilizer circuit simulator, Quantum 5, 497 (2021)
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A trapped-ion architecture based on LDPC codes and cat-state factories achieves 110 logical qubits and one million T gates per day using 2514 physical qubits, with estimates for Heisenberg model simulation on 100 sites in one month using 10000 qubits.
citing papers explorer
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A $\boldsymbol{2d \times d \times d}$ Spacetime Volume Implementation of a Logical S Gate in the Surface Code
A new nearest-neighbor twist-defect braiding protocol implements the logical S gate in the surface code at 2d × d × d spacetime volume with logical error rates comparable to prior methods for d ≥ 5 near p = 10^{-3}.
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Fault-Tolerant Quantum Computing with Trapped Ions: The Walking Cat Architecture
A trapped-ion architecture based on LDPC codes and cat-state factories achieves 110 logical qubits and one million T gates per day using 2514 physical qubits, with estimates for Heisenberg model simulation on 100 sites in one month using 10000 qubits.