MGT protocols encode the input into a measurement-heralded stabilizer code then apply a logical non-Clifford gate; useful resource states are Clifford-equivalent to diagonal states, and feedforward can often be Pauli.
Surface code quantum computing by lattice surgery
5 Pith papers cite this work. Polarity classification is still indexing.
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Pith papers citing it
abstract
In recent years, surface codes have become a leading method for quantum error correction in theoretical large scale computational and communications architecture designs. Their comparatively high fault-tolerant thresholds and their natural 2-dimensional nearest neighbour (2DNN) structure make them an obvious choice for large scale designs in experimentally realistic systems. While fundamentally based on the toric code of Kitaev, there are many variants, two of which are the planar- and defect- based codes. Planar codes require fewer qubits to implement (for the same strength of error correction), but are restricted to encoding a single qubit of information. Interactions between encoded qubits are achieved via transversal operations, thus destroying the inherent 2DNN nature of the code. In this paper we introduce a new technique enabling the coupling of two planar codes without transversal operations, maintaining the 2DNN of the encoded computer. Our lattice surgery technique comprises splitting and merging planar code surfaces, and enables us to perform universal quantum computation (including magic state injection) while removing the need for braided logic in a strictly 2DNN design, and hence reduces the overall qubit resources for logic operations. Those resources are further reduced by the use of a rotated lattice for the planar encoding. We show how lattice surgery allows us to distribute encoded GHZ states in a more direct (and overhead friendly) manner, and how a demonstration of an encoded CNOT between two distance 3 logical states is possible with 53 physical qubits, half of that required in any other known construction in 2D.
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Pinnacle Architecture using QLDPC codes reduces physical qubits needed to factor RSA-2048 to under 100,000 at 10^{-3} error rate.
An exact positive-probability decomposition of thermal relaxation noise into Clifford gates and resets exists for T2 ≤ T1, with a negativity-free approximation that outperforms Pauli twirling for T2 > T1.
Automorphisms of gauge groups extend to higher or non-invertible symmetries in topological gauge theories and enable transversal non-Clifford gates in 2+1d Z_N qudit Clifford stabilizer models for N greater than or equal to 3.
Two new heuristics reduce hardware-limited depth of commuting PPR groups by 10-20% on average (up to 50%) in QASMBench circuits compiled to PPRs.
citing papers explorer
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Magic Gate Teleportation: Structure, Useful Resource States, and Simpler Feedforward
MGT protocols encode the input into a measurement-heralded stabilizer code then apply a logical non-Clifford gate; useful resource states are Clifford-equivalent to diagonal states, and feedforward can often be Pauli.
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The Pinnacle Architecture: Reducing the cost of breaking RSA-2048 to 100 000 physical qubits using quantum LDPC codes
Pinnacle Architecture using QLDPC codes reduces physical qubits needed to factor RSA-2048 to under 100,000 at 10^{-3} error rate.
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Exact and Efficient Stabilizer Simulation of Thermal-Relaxation Noise for Quantum Error Correction
An exact positive-probability decomposition of thermal relaxation noise into Clifford gates and resets exists for T2 ≤ T1, with a negativity-free approximation that outperforms Pauli twirling for T2 > T1.
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Automorphism in Gauge Theories: Higher Symmetries and Transversal Non-Clifford Logical Gates
Automorphisms of gauge groups extend to higher or non-invertible symmetries in topological gauge theories and enable transversal non-Clifford gates in 2+1d Z_N qudit Clifford stabilizer models for N greater than or equal to 3.
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Optimizing Parallel Execution of Commuting Pauli Product Rotations
Two new heuristics reduce hardware-limited depth of commuting PPR groups by 10-20% on average (up to 50%) in QASMBench circuits compiled to PPRs.