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Single-electron operation of a silicon-CMOS 2x2 quantum dot array with integrated charge sensing

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arxiv 2004.11558 v1 pith:EFEWP3IS submitted 2020-04-24 cond-mat.mes-hall

Single-electron operation of a silicon-CMOS 2x2 quantum dot array with integrated charge sensing

classification cond-mat.mes-hall
keywords quantumchargedotsnanowirecmosdevicegatesarray
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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The advanced nanoscale integration available in silicon complementary metal-oxide-semiconductor (CMOS) technology provides a key motivation for its use in spin-based quantum computing applications. Initial demonstrations of quantum dot formation and spin blockade in CMOS foundry-compatible devices are encouraging, but results are yet to match the control of individual electrons demonstrated in university-fabricated multi-gate designs. We show here that the charge state of quantum dots formed in a CMOS nanowire device can be sensed by using floating gates to electrostatically couple it to a remote single electron transistor (SET) formed in an adjacent nanowire. By biasing the nanowire and gates of the remote SET with respect to the nanowire hosting the quantum dots, we controllably form ancillary quantum dots under the floating gates, thus enabling the demonstration of independent control over charge transitions in a quadruple (2x2) quantum dot array. This device overcomes the limitations associated with measurements based on tunnelling transport through the dots and permits the sensing of all charge transitions, down to the last electron in each dot. We use effective mass theory to investigate the necessary optimization of the device parameters in order to achieve the tunnel rates required for spin-based quantum computation.

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