REVIEW 3 major objections 5 minor 2 cited by
Snakes on a Plane: mobile, low dimensional logical qubits on a 2D surface
T0 review · 3 major / 5 minor · reviewed 2026-08-10 · deepseek-v4-flash
Pith's one-line read Mobile logical qubits can be shuttled across a planar chip, with any scratch from a static defect detected and reversed so that defect-induced logical errors stay below ordinary circuit noise.
desk verdict A genuinely new mobile-logical-qubit architecture with a clever rollback protocol; the headline noise-tolerance claim outruns the evidence but the core idea deserves serious refereeing. read the letter →
The pith
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
The reading
What carries the argument
Snake surgery is the central mechanism: a logical snake is doubled in length via XX lattice surgery, then split into an entangled head and tail; the tail stays put under continuous stabilisation while only the head is shuttled, so a suspected scratch can be reversed by measuring the head in the Z basis and teleporting the logical information back to the tail. Two detectors feed the decision. Monitor qubits, one per data qubit, are prepared in $|+\rangle$, shuttled with the snake, and measured in $X$, giving a rotation-angle estimator that saturates the Cramér–Rao bound and flags angles above $\omega_{\max} = 0.3$. The complementary gap—the length difference between the shortest error strings consistent with the measured syndrome but implying opposite logical outcomes—is computed from stabiliser measurements and used to reject low-gap shuttles, which sharpens the decoder's confidence as well as detecting defects. Together they filter the defect-angle distribution so strongly that the product $P(\omega)p_{\mathrm{both}}(\omega)$ integrates below the normal logical error rate.
What would settle it
Deliberately place a known local defect on a shuttling link, run a distance-5 snake through it with the full monitor-plus-complementary-gap protocol, and compare the measured logical error rate per d stabiliser cycles with $P_L + \rho\int_0^\pi P(\omega)p_{\mathrm{both}}(\omega)\,d\omega$; exceeding this by more than simulation error falsifies Eq. (14). A more basic test is to shuttle a probe qubit past a real charge defect and perform process tomography: if the channel is not of the form $U(\omega)^{\otimes N}$ with the same rotation on every qubit, the snake surgery recovery is not exact.
Extended reading notes
Core claim
On the paper's own terms, the discovery is that the worst-case shuttling hazard—an arbitrary, sudden Z phase rotation applied to every data qubit as a snake passes a pin defect—does not cause a logical error, because it can be detected and undone. The key sequence is: grow the snake to double length with an XX lattice surgery, split it into two entangled halves, leave the tail stabilised in place, shuttle only the head, and at the end assess the route. A clean assessment lets the tail be measured out, projecting the state onto the head; a suspicious one has the head measured out, projecting the state back onto the tail. Since the assumed defect channel is entirely Z, the head measurement commutes with the corruption, so the tail is restored no matter how large the phase angle was. With one monitor qubit per data qubit and a complementary-gap post-selection rule $g \ge (d+1)/2$, the paper computes that the resulting defect-induced logical error contribution satisfies $\int_0^\pi P(\omega)p_{\mathrm{both}}(\omega)\,d\omega \le P_L$ for the distances simulated, meaning defects are no worse than the ordinary circuit noise the surface code already handles.
Load-bearing premise
The reversion step only works if a scratch is a pure Z phase rotation with the same angle on every data qubit that passes the defect; any leakage, spin-flip, orbital-excitation, or relaxation component breaks the head-measurement recovery.
Editorial extensions
If this is right
- Long-range shuttling of a logical qubit becomes fault-tolerant: the error rate accumulated while moving a snake across the chip is dominated by the usual circuit-level noise, not by the defects it passes.
- All-to-all connectivity at the logical level follows from free movement over the latticework; even with up to 50% of interaction edges deactivated, a spanning route remains, so defective links can be bypassed.
- Logical CNOTs can be applied transversally at interaction edges, and semi-transversal batching lets the user trade speed against shuttling noise.
- A singlet–triplet encoding suppresses slow g-factor-fluctuation noise during shuttling, so the remaining dominant hazard is the rare catastrophic scratch that snake surgery targets.
- If the defect rate is low, a multi-headed 'hydra' snake can send heads along several routes and use the first clean arrival, or exploit the shared entanglement for quantum fan-out.
Reading between the lines
- The pure-Z assumption is the boundary of the protocol: if real defects produce X errors, leakage, orbital excitation, or relaxation, the head measurement no longer cleanly restores the tail, so the architecture's viability hinges on device-physics measurements of the defect channel, not on the coding theory alone.
- The detection scheme's cost is a 5–10% shuttle rejection rate; an adaptive threshold for the complementary gap that tracks the actual background error rate p could lower this overhead without losing sensitivity.
- Because the monitor qubits use separable states and saturate the Cramér–Rao bound, entangled probe states such as squeezed Dicke states could improve angle estimation by a constant factor in regimes where state-preparation noise is low, an option the paper notes but does not adopt.
- The hydra extension implies circuit-level optimisations beyond rerouting: the entangled multi-head state is a resource for quantum fan-out circuits, which could shorten depth in distillation or data-loading routines if shuttling routes are plentiful.
Signed reviews
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The paper proposes an architecture, 'snakes on a plane', in which logical qubits are 1D strings of data qubits that shuttle across a planar latticework of 2×N filaments. The authors argue that silicon-spin qubits support fast high-fidelity shuttling, and that the architecture provides all-to-all logical connectivity, damage-tolerant routing, and efficient transversal gates. To protect against static charge defects that 'scratch' a passing logical qubit, they introduce a detection-and-reversal protocol ('snake surgery'): monitor qubits and a complementary-gap filter infer whether a defect was encountered, and if so, a head-tail split is measured out so that the logical information returns to a stationary tail. They claim that, for purely Z-type scratches of arbitrary strength, the defect-induced logical error rate is bounded by the normal circuit-level logical error rate, expressed as Eq. (14), and that this holds 'for any code distance'. They support this with QEC simulations up to distance 13 under circuit-level noise, Gaussian and linear-log extrapolations, and a Cramér-Rao-optimal monitor-qubit metrology analysis. The paper also develops a semi-transversal CNOT protocol and discusses percolation-based connectivity in the presence of defective links.
Significance. If the central claims hold, the paper makes a substantial architectural contribution: it offers a concrete, experimentally grounded route to mobile logical qubits in silicon spin devices, with an appealing combination of logical-level connectivity, damage tolerance, and efficient gates. The QEC simulations are standard and the monitor-qubit analysis is a genuine strength: the estimation strategy saturates the Cramér-Rao bound, and the robustness analysis against dephasing and readout noise is explicit. The independent surface-code threshold calculation for defect-induced dephasing is a useful quantitative anchor. However, the strongest quantitative claim—Eq. (14) and the 'any code distance' statement—is limited by two load-bearing issues: the pure-Z assumption on the scratch channel, which is acknowledged but not validated physically, and the reliance on low-distance simulations with extrapolations and no reported error bars. The significance is therefore conditional: the architecture and protocols are valuable, but the headline defect-tolerance claim needs qualification or further support.
major comments (3)
- [§III.C, §III.F, Eq. (14)] The central quantitative claim, Eq. (14), is stated without the condition under which snake surgery provably works. The recovery step measures the head in the Z basis, and this only commutes with errors that are diagonal in the computational basis. Section III.A itself notes that a sudden scratch 'could lead to orbital excitations, and thus to dephasing due to the difference in g-factor between the orbital states,' and Section III.C explicitly conditions the reversion on 'provided they are pure Z errors.' The Discussion repeats this caveat, yet Eq. (14) and the surrounding text in Section III.F do not carry it, and the Discussion asserts tolerance 'for any code distance' without qualification. If a real defect produces any X-type error, leakage, non-unitary relaxation, or a phase that is not identical on every shuttled qubit, the head measurement does not project the tail back to the uncorrupted state, and the defect-induced term in Eq. (12) is underestimated. This is not an algebraic error in the protocol, but it is a load-bearing physical assumption that must either be justified by a device-physics model or explicitly carried through every quantitative claim, including Eq. (14).
- [§III.F, Figs. 13–14, Eq. (14)] The claim that Eq. (14) holds 'for any code distance' is an extrapolation from simulations up to d=13. The left panel of Fig. 13 uses Gaussian extrapolation for the tails of pgap(ω), and the right panel uses linear regressions (in log scale) for P(ω); Fig. 14 is then computed from these extrapolations. No error bars or confidence intervals are reported for the extrapolated curves or for the integrals in Eq. (14). The observation that the ratio decreases with d is suggestive, but it is not a proof of the asymptotic statement. I ask the authors to either soften the 'any code distance' claim to a statement about the simulated range with extrapolation, or to provide a rigorous argument (or substantially larger-distance data with quantified extrapolation error) that the inequality persists for all d.
- [§III.D, Appendix F, Eq. (13)] The monitor-qubit detection scheme assumes that the scratch channel is a single common-mode Z rotation applied identically to every monitor qubit and data qubit that passes the defect. The paper does not analyze the case where the magnitude or sign of ω varies across the shuttled qubits, or where the phase is accompanied by a small stochastic Z component. Such spatial variation would affect both the monitor distribution pmon(ω) and the logical error probability P(ω), and the conditional-independence factorization in Eq. (13) would need to be re-examined because the same physical defect would then couple the two detection channels in a more complex way. I request that the authors state the common-mode assumption explicitly and discuss how spatial variation would modify the claimed bound.
minor comments (5)
- [Abstract and §III.E] The abstract uses 'complimentary gap'; this should be 'complementary gap' to match the terminology in Section III.E.
- [Introduction, §II] The introduction contains 'flexility' where 'flexibility' is intended, and the caption of Fig. 1 contains 'SW AP' with an internal space; these should be corrected.
- [§III.C, Eq. (7)] In Step 2, the notation 'XLXL' is used without first defining XL for the doubled snake; please clarify whether this is the logical X operator on the full 2d×d code and how the sign of the measurement outcome enters Eq. (7).
- [§III.D and Appendix F] In the estimator description below Eq. (F20), 'arctan2' is used without specifying the branch or the convention for ω∈[−π,π]; please state the branch so the estimator is unambiguous.
- [Fig. 13 caption] The left panel lists distances d=3,7,11,15 while the right panel plots data for distances that are not enumerated in the caption; please list the distances and symbols used in the right panel.
Circularity Check
No significant circularity: the defect-tolerance estimate Eq. (14) is assembled from independent Monte Carlo simulations, an explicit estimator derivation, and a justified conditional-independence factorization, rather than reducing to its own inputs.
full rationale
The paper's central derivation chain is not circular. Snake surgery (Section III C) is a direct quantum-information identity: because the assumed defect channel D_phi is diagonal in the Z basis, measuring the head in the Z basis commutes with it, so the tail is restored by construction; this is an algebraic fact, not a fitted result. The monitor-qubit performance is derived from explicit binomial likelihood functions in Appendix F, including Cramer-Rao bounds and a stated noise model, and the complementary-gap post-selection and P(omega) are obtained from surface-code Monte Carlo simulations described in Appendices D, E, and G. Equation (13) is justified by the stated non-entanglement of monitor qubits with data and ancilla qubits, giving conditional independence given omega. Equation (14) is then a computed integral of independently simulated factors; the target P_L is the ordinary circuit-level logical error rate, not a parameter fitted to force the inequality. The paper does rely on the authors' prior 2xN-array work [8] for the underlying layout and shuttling noise assumptions, and it explicitly assumes pure-Z defect errors, but these are architectural and physical assumptions rather than circular reductions of the claimed result. The extrapolation to 'any code distance' is an extrapolation, not a self-justification, and the pure-Z caveat is repeatedly stated rather than hidden.
Assumptions & free parameters
free parameters (7)
- omega_max (tolerable defect angle) =
0.3 rad = omega_th/2; omega_th = 0.62 from threshold simulation
- omega_hat_max (monitor detection threshold) =
0.075 rad = omega_max/4
- gmin (complementary-gap threshold) =
(d+1)/2
- lambda (monitor noise strength) =
0.2% (0.1% dephasing plus 0.1% readout)
- p (circuit-level noise) =
0.1% per operation
- rho (defect rate) =
not fixed; assumed much smaller than 5-10%
- N_monitor =
d^2 (one monitor qubit per data qubit)
assumptions (8)
- ad hoc to paper Defect-induced scratches are pure Z phase rotations applied to every data qubit and monitor qubit that passes near the defect; there are no X errors, leakage, or orbital excitations.
- domain assumption Defect rate rho is low enough that at most one defect occurs per shuttling event and most defect declarations are false positives.
- domain assumption Monitor qubits see the same phase channel as data qubits at the same location, so their measurements reveal the Z rotation that the snake experienced.
- domain assumption The Ornstein-Uhlenbeck sheet model of Ref. [47] describes the slowly fluctuating magnetic-field landscape during shuttling.
- standard math A coherent Z rotation of angle omega can be twirled into a dephasing channel with rate q = sin^2(omega/2).
- domain assumption Shuttling noise on long, defect-free paths is negligible compared with gate noise.
- domain assumption The monitor-qubit and complementary-gap detection outcomes are conditionally independent given the defect angle omega.
- standard math Lattice surgery operations for snake growth and splitting are fault-tolerant and have the same logical error rate as d rounds of static surface-code stabilizer measurement.
Cite this review
Pith. "Pith review of Snakes on a Plane: mobile, low dimensional logical qubits on a 2D surface." pith.science (2026). https://pith.science/paper/GHP4VRAS
@misc{pith2026250102120,
author = {Pith},
title = {Pith review of: Snakes on a Plane: mobile, low dimensional logical qubits on a 2D surface},
year = {2026},
howpublished = {\url{https://pith.science/paper/GHP4VRAS}},
note = {Machine review of arXiv:2501.02120}
}
read the original abstract
Recent demonstrations indicate that silicon-spin QPUs will be able to shuttle physical qubits rapidly and with high fidelity - a desirable feature for maximising logical connectivity, supporting new codes, and routing around damage. However it may seem that shuttling at the logical level is unwise: static defects in the device may 'scratch' a logical qubit as it passes, causing correlated errors to which the code is highly vulnerable. Here we explore an architecture where logical qubits are 1D strings ('snakes') which can be moved freely over a planar latticework. Possible scratch events are inferred via monitor qubits and the complimentary gap; if deemed a risk, remarkably the shuttle process can be undone in a way that negates any corruption. Interaction between logical snakes is facilitated by a semi-transversal method. We obtain encouraging estimates for the tolerable levels of shuttling-related imperfections.
Figures
Figures from the paper (17 more)
Forward citations
Cited by 2 Pith papers
-
A route to damage tolerance exceeding $10\%$ in shuttling-equipped quantum processors
Shuttling-based spin-qubit surface codes retain roughly half their effective code distance at 10% hardware damage, so oversizing by ~2x can compensate.
-
Spin-orbit-enabled realization of arbitrary two-qubit gates on moving spins
Spin-orbit coupling during shuttling of two spin qubits can realize any two-qubit gate in one step.
Reference graph
Works this paper leans on
-
[1]
A. G. Fowler, M. Mariantoni, J. M. Martinis, and A. N. Cleland, Surface codes: Towards practical large- scale quantum computation, Physical Review A 86, 10.1103/physreva.86.032324 (2012). 18
-
[2]
Task (i): defect detection For task (i), we first define ωmax as the maximum value of ω a logical snake can tolerate when it is shuttled near a defect, without inducing a dramatic increase of the log- ical error rate. We set ωmax = ωth/2, where ωth = 9% is the error correction threshold for such a scenario (as- suming circuit-level noise of strength p = 0...
-
[3]
Task (ii): angle estimation For task (ii), we simply plot the RMS error ∆ ω of the estimator ˆω with respect to ω ∈ [−π, π]. The dashed lines represent the corresponding Cram´ er-Rao bounds as 1/ √ N and confirm that even for a relatively low number of shots these asymptotic bounds are practically satu- rated near the rotation angles ±π/2, 0 and ±π. In ot...
-
[4]
C. Gidney and M. Eker ˚ a, How to factor 2048 bit RSA in- tegers in 8 hours using 20 million noisy qubits, Quantum 5, 433 (2021)
work page 2021
-
[5]
S. B. Bravyi and A. Y. Kitaev, Quantum codes on a lattice with boundary (1998)
1998
-
[6]
A. Y. Kitaev, Quantum computations: algorithms and error correction, Russian Mathematical Surveys 52, 1191 (1997)
1997
-
[7]
R. Li, L. Petit, D. P. Franke, J. P. Dehollain, J. Helsen, M. Steudtner, N. K. Thomas, Z. R. Yoscovits, K. J. Singh, S. Wehner, L. M. K. Vandersypen, J. S. Clarke, and M. Veldhorst, A crossbar network for silicon quan- tum dot qubits, Science Advances 4, eaar3960 (2018), https://www.science.org/doi/pdf/10.1126/sciadv.aar3960
-
[8]
Z. Cai, A. Siegel, and S. Benjamin, Looped pipelines en- abling effective 3d qubit lattices in a strictly 2d device, PRX Quantum 4, 020345 (2023)
work page 2023
Show all 60 references
-
[9]
K¨ unne, A
M. K¨ unne, A. Willmes, M. Oberl¨ ander, C. Gorjaew, J. D. Teske, H. Bhardwaj, M. Beer, E. Kammerloher, R. Ot- ten, I. Seidler, R. Xue, L. R. Schreiber, and H. Bluhm, The SpinBus architecture for scaling spin qubits with electron shuttling, Nature Communications 15, 4977 (2024)
2024
-
[10]
Siegel, A
A. Siegel, A. Strikis, and M. Fogarty, Towards early fault tolerance on a 2 ×n array of qubits equipped with shut- tling (2024), arXiv:2402.12599 [quant-ph]
2024 arXiv
-
[11]
Pataki and A
D. Pataki and A. P´ alyi, Compiling the surface code to crossbar spin qubit architectures (2024), arXiv:2412.05425 [cond-mat.mes-hall]
2024 arXiv
-
[12]
Bluvstein, S
D. Bluvstein, S. J. Evered, A. A. Geim, S. H. Li, H. Zhou, T. Manovitz, S. Ebadi, M. Cain, M. Kalinowski, D. Hangleiter, J. P. B. Ataides, N. Maskara, I. Cong, X. Gao, P. S. Rodriguez, T. Karolyshyn, G. Semeghini, M. J. Gullans, M. Greiner, V. Vuleti´ c, and M. D. Lukin, Logic...
2023 doi
-
[13]
J. M. Pino, J. M. Dreiling, C. Figgatt, J. P. Gaebler, S. A. Moses, M. S. Allman, C. H. Baldwin, M. Foss-Feig, D. Hayes, K. Mayer, C. Ryan-Anderson, and B. Neyen- huis, Demonstration of the trapped-ion quantum ccd computer architecture, Nature 592, 209 (2021)
2021
-
[14]
Langrock, J
V. Langrock, J. A. Krzywda, N. Focke, I. Seidler, L. R. Schreiber, and L. Cywi´ nski, Blueprint of a scalable spin qubit shuttle device for coherent mid-range qubit trans- fer in disordered si/sige/sio 2, PRX Quantum 4, 020305 (2023)
2023
-
[15]
Struck, A
T. Struck, A. Hollmann, F. Schauer, O. Fedorets, A. Schmidbauer, K. Sawano, H. Riemann, N. V. Abrosi- mov, L. Cywinski, D. Bougeard, and L. R. Schreiber, Low-frequency spin qubit energy splitting noise in highly purified 28si/sige, npj Quantum Information 6, 10.1038/s41534-020...
2020 doi
-
[16]
M. F. Gonzalez-Zalba, S. de Franceschi, E. Charbon, T. Meunier, M. Vinet, and A. S. Dzurak, Scaling silicon- based quantum computing using CMOS technology, Na- ture Electronics 4, 872 (2021)
2021
-
[17]
Maurand, X
R. Maurand, X. Jehl, D. Kotekar-Patil, A. Corna, H. Bo- huslavskyi, R. Lavi´ eville, L. Hutin, S. Barraud, M. Vinet, M. Sanquer, and S. De Franceschi, A cmos silicon spin qubit, Nature Communications 7, 10.1038/ncomms13575 (2016)
2016 doi
-
[18]
A. M. J. Zwerver, T. Kr¨ ahenmann, T. F. Watson, L. Lampert, H. C. George, R. Pillarisetty, S. A. Bojarski, P. Amin, S. V. Amitonov, J. M. Boter, R. Caudillo, D. Correas-Serrano, J. P. Dehollain, G. Droulers, E. M. Henry, R. Kotlyar, M. Lodari, F. L¨ uthi, D. J. Michalak, B. K...
2022
-
[19]
X. Xue, B. Patra, J. P. G. van Dijk, N. Samkharadze, S. Subramanian, A. Corna, B. Paquelet Wuetz, C. Jeon, F. Sheikh, E. Juarez-Hernandez, B. P. Esparza, H. Ram- purawala, B. Carlton, S. Ravikumar, C. Nieva, S. Kim, H.-J. Lee, A. Sammak, G. Scappucci, M. Veldhorst, F. Sebastia...
2021
-
[20]
Ruffino, T.-Y
A. Ruffino, T.-Y. Yang, J. Michniewicz, Y. Peng, E. Charbon, and M. F. Gonzalez-Zalba, A cryo-cmos chip that integrates silicon quantum dots and multiplexed dispersive readout electronics, Nature electronics 5, 53 (2022)
2022
-
[21]
S. G. J. Philips, M. T. Madzik, S. V. Amitonov, S. L. de Snoo, M. Russ, N. Kalhor, C. Volk, W. I. L. Lawrie, D. Brousse, L. Tryputen, B. P. Wuetz, A. Sammak, M. Veldhorst, G. Scappucci, and L. M. K. Vandersypen, Universal control of a six-qubit quantum processor in sil- icon, ...
2022
-
[22]
Takeda, A
K. Takeda, A. Noiri, T. Nakajima, T. Kobayashi, and S. Tarucha, Quantum error correction with silicon spin qubits, Nature 608, 682 (2022)
2022
-
[23]
X. Xue, M. Russ, N. Samkharadze, B. Undseth, A. Sam- mak, G. Scappucci, and L. M. K. Vandersypen, Quantum logic with spin qubits crossing the surface code threshold, Nature 601, 343 (2022)
2022
-
[24]
Noiri, K
A. Noiri, K. Takeda, T. Nakajima, T. Kobayashi, A. Sam- mak, G. Scappucci, and S. Tarucha, Fast universal quan- tum gate above the fault-tolerance threshold in silicon, Nature 601, 338 (2022)
2022
-
[25]
A. R. Mills, C. R. Guinn, M. J. Gullans, A. J. Sigillito, M. M. Feldman, E. Nielsen, and J. R. Petta, Two-qubit silicon quantum processor with operation fidelity exceed- ing 99%, Science Advances 8, 10.1126/sciadv.abn5130 (2022)
2022 doi
-
[26]
Steinacker, N
P. Steinacker, N. D. Stuyck, W. H. Lim, T. Tanttu, M. Feng, A. Nickl, S. Serrano, M. Candido, J. D. Ci- fuentes, F. E. Hudson, K. W. Chan, S. Kubicek, J. Jus- sot, Y. Canvel, S. Beyne, Y. Shimura, R. Loo, C. God- frin, B. Raes, S. Baudot, D. Wan, A. Laucht, C. H. Yang, A. Sara...
2024 arXiv
-
[27]
Yoneda, K
J. Yoneda, K. Takeda, T. Otsuka, T. Nakajima, M. R. Delbecq, G. Allison, T. Honda, T. Kodera, S. Oda, Y. Hoshi, N. Usami, K. M. Itoh, and S. Tarucha, A quantum-dot spin qubit with coherence limited by charge noise and fidelity higher than 99.9%, Nature Nanotech- nology 13, 102 (2018)
2018
-
[28]
Hutin, B
L. Hutin, B. Bertrand, E. Chanrion, H. Bohuslavskyi, F. Ansaloni, T. Y. Yang, J. Michniewicz, D. J. Niege- mann, C. Spence, T. Lundberg, A. Chatterjee, A. Crippa, J. Li, R. Maurand, X. Jehl, M. Sanquer, M. F. Gonzalez- Zalba, F. Kuemmeth, Y. M. Niquet, S. D. Franceschi, M. Urd...
2019 arXiv
-
[29]
M. D. Smet, Y. Matsumoto, A.-M. J. Zwerver, L. Try- puten, S. L. de Snoo, S. V. Amitonov, A. Sammak, N. Samkharadze, ¨Onder G¨ ul, R. N. M. Wasserman, M. Rimbach-Russ, G. Scappucci, and L. M. K. Vander- sypen, High-fidelity single-spin shuttling in silicon (2024), arXiv:2406.0...
2024 arXiv
-
[30]
Yoneda, W
J. Yoneda, W. Huang, M. Feng, C. H. Yang, K. W. Chan, T. Tanttu, W. Gilbert, R. C. C. Leon, F. E. Hud- son, K. M. Itoh, A. Morello, S. D. Bartlett, A. Laucht, A. Saraiva, and A. S. Dzurak, Coherent spin qubit trans- port in silicon, Nature Communications 12, 4114 (2021)
2021
-
[31]
Seidler, T
I. Seidler, T. Struck, R. Xue, N. Focke, S. Trel- lenkamp, H. Bluhm, and L. R. Schreiber, Conveyor- mode single-electron shuttling in Si/SiGe for a scal- able quantum computing architecture, arXiv:2108.00879 [cond-mat, physics:quant-ph] (2021)
2021 arXiv
-
[32]
B. M. Maune, M. G. Borselli, B. Huang, T. D. Ladd, P. W. Deelman, K. S. Holabird, A. A. Kise- lev, I. Alvarado-Rodriguez, R. S. Ross, A. E. Schmitz, M. Sokolich, C. A. Watson, M. F. Gyure, and A. T. Hunter, Coherent singlet-triplet oscillations in a silicon- based double quant...
2012
-
[33]
Zheng, N
G. Zheng, N. Samkharadze, M. L. Noordam, N. Kalhor, D. Brousse, A. Sammak, G. Scappucci, and L. M. K. Vandersypen, Rapid gate-based spin read-out in silicon using an on-chip resonator, Nature Nanotechnology 14, 742 (2019)
2019
-
[34]
Takeda, A
K. Takeda, A. Noiri, T. Nakajima, L. C. Camen- zind, T. Kobayashi, A. Sammak, G. Scappucci, and S. Tarucha, Rapid single-shot parity spin readout in a silicon double quantum dot with fidelity exceeding 99%, npj quantum information 10, 22 (2024)
2024
-
[35]
Gidney and M
C. Gidney and M. Eker ˚ a, How to factor 2048 bit rsa in- tegers in 8 hours using 20 million noisy qubits, Quantum 5, 433 (2021)
2021
-
[36]
Stano and D
P. Stano and D. Loss, Review of performance metrics of spin qubits in gated semiconducting nanostructures, Nature Reviews Physics 4, 672 (2022)
2022
-
[37]
K¸ epa, N
M. K¸ epa, N. Focke, L. Cywi´ nski, and J. A. Krzywda, Simulation of 1/f charge noise affecting a quantum dot in a Si/SiGe structure, Applied Physics Letters123, 034005 (2023)
2023
-
[38]
Elsayed, M
A. Elsayed, M. M. K. Shehata, C. Godfrin, S. Kubicek, S. Massar, Y. Canvel, J. Jussot, G. Simion, M. Mongillo, D. Wan, B. Govoreanu, I. P. Radu, R. Li, P. Van Dorpe, and K. De Greve, Low charge noise quantum dots with industrial CMOS manufacturing, npj Quantum Informa- tion 10...
2024
-
[39]
Yoneda, J
J. Yoneda, J. S. Rojas-Arias, P. Stano, K. Takeda, A. Noiri, T. Nakajima, D. Loss, and S. Tarucha, Noise- correlation spectrum for a pair of spin qubits in silicon, Nature Physics 19, 1793 (2023)
2023
-
[40]
Jnane and S
H. Jnane and S. C. Benjamin, Ab initio modelling of quantum dot qubits: Coupling, gate dynamics and ro- bustness versus charge noise (2024), arXiv:2403.00191 [cond-mat.mes-hall]
2024
-
[41]
M. M. E. K. Shehata, G. Simion, R. Li, F. A. Mo- hiyaddin, D. Wan, M. Mongillo, B. Govoreanu, I. Radu, K. De Greve, and P. Van Dorpe, Modeling semiconductor spin qubits and their charge noise environment for quan- tum gate fidelity estimation, Phys. Rev. B 108, 045305 (2023)
2023
-
[42]
Culcer, X
D. Culcer, X. Hu, and S. Das Sarma, Dephasing of Si spin qubits due to charge noise, Applied Physics Letters 95, 073102 (2009), https://pubs.aip.org/aip/apl/article- pdf/doi/10.1063/1.3194778/14105785/073102 1 online.pdf
2009 doi
-
[43]
Rojas-Arias, A
J. Rojas-Arias, A. Noiri, P. Stano, T. Nakajima, J. Yoneda, K. Takeda, T. Kobayashi, A. Sammak, G. Scappucci, D. Loss, and S. Tarucha, Spatial noise correlations beyond nearest neighbors in 28Si/si-ge spin qubits, Phys. Rev. Appl. 20, 054024 (2023)
2023
-
[44]
Mehmandoost and V
M. Mehmandoost and V. V. Dobrovitski, Decoherence induced by a sparse bath of two-level fluctuators: Pecu- liar features of 1 /f noise in high-quality qubits, Phys. Rev. Res. 6, 033175 (2024)
2024
-
[45]
Loss and D
D. Loss and D. P. DiVincenzo, Quantum computation with quantum dots, Physical Review A 57, 120 (1998)
1998
-
[46]
Burkard, T
G. Burkard, T. D. Ladd, J. M. Nichol, A. Pan, and J. R. Petta, Semiconductor Spin Qubits, arXiv:2112.08863 [cond-mat, physics:physics, physics:quant-ph] (2021)
2021 arXiv
-
[47]
Levy, Universal quantum computation with spin-1 /2 pairs and heisenberg exchange, Phys
J. Levy, Universal quantum computation with spin-1 /2 pairs and heisenberg exchange, Phys. Rev. Lett. 89, 147902 (2002)
2002
-
[48]
D. P. DiVincenzo, D. Bacon, J. Kempe, G. Burkard, and K. B. Whaley, Universal quantum computation with the exchange interaction, Nature 408, 339 (2000)
2000
-
[49]
A. S. Mokeev, Y.-N. Zhang, and V. V. Dobrovitski, Mod- eling of decoherence and fidelity enhancement during transport of entangled qubits (2024), arXiv:2409.04404 [cond-mat.mes-hall]
2024 arXiv
-
[50]
Horsman, A
D. Horsman, A. G. Fowler, S. Devitt, and R. V. Meter, Surface code quantum computing by lattice surgery, New Journal of Physics 14, 123011 (2012)
2012
-
[51]
Gokhale, S
P. Gokhale, S. Koretsky, S. Huang, S. Majumder, A. Drucker, K. R. Brown, and F. T. Chong, Quantum fan-out: Circuit optimizations and technology model- ing, in 2021 IEEE International Conference on Quantum Computing and Engineering (QCE)(2021) pp. 276–290
2021
-
[52]
Gidney, M
C. Gidney, M. Newman, P. Brooks, and C. Jones, Yoked surface codes (2023), arXiv:2312.04522 [quant-ph]
2023 arXiv
-
[53]
J. J. Wallman and J. Emerson, Noise tailoring for scalable quantum computation via randomized compiling, Physi- cal Review A 94, 052325 (2016)
2016
-
[54]
T´ oth and I
G. T´ oth and I. Apellaniz, Quantum metrology from a quantum information science perspective, Journal of Physics A: Mathematical and Theoretical 47, 424006 (2014)
2014
-
[55]
Koczor, S
B. Koczor, S. Endo, T. Jones, Y. Matsuzaki, and S. C. Benjamin, Variational-state quantum metrology, New Journal of Physics 22, 083038 (2020). Appendix A: Alternative latticework structures We here give two examples of arrangements of the 2×N devices, other than the one studie...
2020
-
[56]
In such a scenario the channel Φ(·) = U (·)U † is unitary and acts on each qubit as a Z rotation gate by an unknown angle as U = e−iωZ/2
Parameter estimation task A dominant source of error in spin qubits is the fluctua- tion of the internal Rabi frequency of the qubits by a vari- able amount ω via the Hamiltonian as H = ωZ/2, where Z is the Pauli Z operator. In such a scenario the channel Φ(·) = U (·)U † is un...
-
[57]
Effect of dephasing and readout errors So far we analysed the precision of ideal state prepa- ration and measurement and now argue that the present scheme is particularly robust against the dominant noise sources in solid-state devices as dephasing and readout errors. Effect o...
-
[58]
The first one is detecting with maximum probability if a defect occurred, regard- less of the value of its angle
T ask (i): defect detection After explaining the generalities of monitor qubits, we can now delve into the implementation of the two tasks monitor qubits are utilised for. The first one is detecting with maximum probability if a defect occurred, regard- less of the value of it...
-
[59]
the precise evalua- tion of the angle ω
T ask (ii): estimating large rotation angles We now focus on task ( ii), i.e. the precise evalua- tion of the angle ω. For this purpose, we devise an es- timator that can accurately approximate ω in the full range ( −π, π), such that we are optimally sensitive to the angles 0 ...
-
[60]
For this reason, we estimate resource requirements for esti- mating whether the purity of the shuttled qubits remains nearly pure
T est non-unitarity by estimating purity Unitary rotations can be estimated and then corrected by inverse rotations, however, significant non-unitary noise above threshold can potentially be detrimental. For this reason, we estimate resource requirements for esti- mating wheth...
Reviewed August 10, 2026 · model on record in the stance chip above.
Discussion (0). Continue with ORCID to comment.