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The Art of Beating the Odds with Predictor-Guided Random Design Space Exploration

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arxiv 2502.17936 v3 pith:4LMJSIBJ submitted 2025-02-25 cs.LG cs.AR

The Art of Beating the Odds with Predictor-Guided Random Design Space Exploration

classification cs.LG cs.AR
keywords synthesiscircuitscombinationalexplorationmethodpredictionrandomspeedup
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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This work introduces an innovative method for improving combinational digital circuits through random exploration in MIG-based synthesis. High-quality circuits are crucial for performance, power, and cost, making this a critical area of active research. Our approach incorporates next-state prediction and iterative selection, significantly accelerating the synthesis process. This novel method achieves up to 14x synthesis speedup and up to 20.94% better MIG minimization on the EPFL Combinational Benchmark Suite compared to state-of-the-art techniques. We further explore various predictor models and show that increased prediction accuracy does not guarantee an equivalent increase in synthesis quality of results or speedup, observing that randomness remains a desirable factor.

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