Enhancing AI Interpretability and Safety through Localised Architectures

Ian Seet; Jonas Bozenhard; Simon Ostermann

arxiv: 2606.07998 · v2 · pith:7K44JHX4new · submitted 2026-06-06 · 💻 cs.LG · cs.AI

Enhancing AI Interpretability and Safety through Localised Architectures

Ian Seet , Jonas Bozenhard , Simon Ostermann This is my paper

Pith reviewed 2026-06-27 20:19 UTC · model grok-4.3

classification 💻 cs.LG cs.AI

keywords localized architecturesAI interpretabilityhardware machine learningdeep neural networksAI safetyenergy efficiencysmall datasetsexpressivity

0 comments

The pith

Localized hardware architectures can achieve greater interpretability than deep neural networks on smaller datasets.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper reasons from the observation that localized machine learning models tend to be more interpretable and computationally efficient than deep neural networks when data is limited. It draws an analogy to propose that localized hardware ML architectures, featuring lower bandwidth but higher expressivity per node, could deliver fundamentally better interpretability and safety than GPU-cluster-based deep networks while remaining competitive on smaller datasets. This addresses concerns over the opacity and resource demands of large generative models. The authors then assess different hardware paradigms for their ability to support such localized designs based on per-node expressivity, energy use, and technological readiness.

Core claim

The paper claims that localised architectures with lower bandwidth but higher expressivity per node have the potential to be fundamentally more interpretable than deep neural networks running on GPU clusters while remaining competitive for smaller datasets, and it evaluates hardware ML paradigms for implementing them.

What carries the argument

Localised hardware ML architectures that trade lower bandwidth for higher per-node expressivity to support machine learning models.

If this is right

Such architectures could reduce reliance on massive parallel hardware for tasks where data volume is modest.
They offer a route to improved safety through easier inspection of model decisions.
Hardware paradigms would need to be selected or developed to balance per-node expressivity with energy efficiency.
The approach would apply mainly to smaller datasets rather than the largest scale problems.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

This line of work could shift research emphasis toward hardware designs that prioritize node-level capability over sheer scale of parallelism.
If the analogy holds, it might favor regulatory or deployment standards that reward measurable interpretability in deployed systems.
Practical adoption would require new benchmarks that jointly score accuracy, explanation quality, and energy use on limited data.

Load-bearing premise

Advantages observed in software-based localized ML models on small datasets will translate directly to hardware ML architectures in interpretability and efficiency.

What would settle it

A side-by-side test on a small dataset measuring both predictive accuracy and the fidelity of explanations extracted from a localized hardware implementation versus a standard deep neural network.

read the original abstract

Recent advances in generative AI, especially powerful Large Language Models (LLMs) and Large Reasoning Models (LRMs), raise concerns over the interpretability, safety and sustainability of these large and opaque AI models. The power of such architectures is derived not only from the scalability of deep neural networks, but also massively parallel hardware such as GPU clusters. The diffuse nature of deep neural networks gives them great function-approximation capability when provided with sufficient training data but imposes a cost in interpretability and computational efficiency. Observing that localised machine learning (ML) models tend to be more interpretable and computationally efficient than deep neural networks on small datasets, we reason by analogy that similar advantages may apply to specific localised hardware ML architectures. We argue that localised architectures with lower bandwidth but higher expressivity per node have the potential to be fundamentally more interpretable than deep neural networks running on GPU clusters while remaining competitive for smaller datasets. We then evaluate the suitability of various hardware ML paradigms for implementing such localised architectures and evaluate their per-node expressivity, energy efficiency and practical maturity of the technology required.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Desk Editor's Note private letter to a colleague

This is a high-level analogy paper that surveys hardware options for localized ML but adds no data, derivations, or tests to support its interpretability claims.

read the letter

The core of this paper is an analogy: localized models that work well on small datasets in software might translate to hardware architectures with lower bandwidth and higher per-node expressivity, making them more interpretable than GPU-scale DNNs. It then reviews hardware paradigms for implementing that idea and rates them on expressivity, energy efficiency, and maturity.

What the paper does is lay out a clear comparison of options like neuromorphic chips, FPGAs, and other specialized hardware, pulling together known properties without claiming new measurements. That survey section is the most concrete part and could save someone time if they are already looking at edge or low-power setups.

The soft spot is that the central claim stays at the level of potential and reasoning by analogy. There are no experiments, no controlled comparisons, and no attempt to check whether the interpretability or efficiency gains actually appear when the same localized approach moves from software to hardware. The authors note the limits themselves, but that leaves the argument without load-bearing evidence.

This is for readers already working on hardware choices for AI safety or interpretability in constrained environments. A person looking for new techniques or results will not find them here. It is honest in its framing but thin on substance.

I would not bring it to a reading group or cite it. It does not seem ready for serious peer review as a research contribution; it reads more like a position piece that would need substantial new content to justify referee time.

Referee Report

2 major / 2 minor

Summary. The manuscript proposes that localized hardware ML architectures, featuring lower bandwidth but higher expressivity per node, have the potential to deliver superior interpretability and safety compared to deep neural networks on GPU clusters, while remaining competitive on smaller datasets. It proceeds by analogy from observed properties of software-based localized models and then qualitatively evaluates the suitability of various hardware ML paradigms (e.g., neuromorphic or other specialized accelerators) according to per-node expressivity, energy efficiency, and technological maturity.

Significance. If the hypothesized translation from software to hardware holds, the work could usefully redirect attention toward hardware-level designs that trade global bandwidth for local expressivity, potentially mitigating interpretability and sustainability issues in large generative models. The conceptual framing identifies a coherent research direction, but the complete absence of quantitative comparisons, derivations, or even illustrative calculations means any significance remains conditional on future empirical validation.

major comments (2)

[Abstract and the paragraph immediately following the abstract (reasoning-by-analogy passage)] The central claim—that interpretability and efficiency advantages observed in software localized models will carry over to hardware implementations—rests entirely on untested analogy without any supporting data, controlled comparisons, or even a sketched derivation showing how hardware constraints (noise, precision, interconnect) would preserve those advantages.
[Section evaluating hardware ML paradigms (per-node expressivity, energy efficiency, and maturity)] The subsequent evaluation of hardware paradigms reports no concrete metrics, references to existing implementations, or falsifiable criteria for 'higher expressivity per node' or 'lower bandwidth,' rendering the assessment non-actionable and preventing any assessment of whether the claimed advantages are load-bearing.

minor comments (2)

[Abstract] The abstract and introduction would benefit from an explicit statement that the paper offers a hypothesis rather than a demonstrated result.
[Terminology and evaluation sections] Notation for 'localised architectures' and 'expressivity per node' is used without a precise definition or illustrative example that would allow readers to map the concepts onto concrete hardware designs.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the detailed and constructive report. We agree that the manuscript is conceptual in nature and relies on analogy without quantitative validation or concrete metrics. Below we respond to each major comment and indicate planned revisions to improve clarity and actionability while preserving the paper's scope as a position piece.

read point-by-point responses

Referee: [Abstract and the paragraph immediately following the abstract (reasoning-by-analogy passage)] The central claim—that interpretability and efficiency advantages observed in software localized models will carry over to hardware implementations—rests entirely on untested analogy without any supporting data, controlled comparisons, or even a sketched derivation showing how hardware constraints (noise, precision, interconnect) would preserve those advantages.

Authors: We agree that the central claim rests on an untested analogy and that no supporting data, comparisons, or derivations addressing hardware-specific constraints are provided. The manuscript is framed as a hypothesis-generating position paper rather than an empirical study. In revision we will expand the reasoning-by-analogy passage to include an explicit discussion of hardware constraints (noise, precision, interconnect) and why the software advantages might plausibly translate, together with additional references to localized software models and early neuromorphic work. We will also add a dedicated limitations paragraph stating that empirical validation remains future work. revision: yes
Referee: [Section evaluating hardware ML paradigms (per-node expressivity, energy efficiency, and maturity)] The subsequent evaluation of hardware paradigms reports no concrete metrics, references to existing implementations, or falsifiable criteria for 'higher expressivity per node' or 'lower bandwidth,' rendering the assessment non-actionable and preventing any assessment of whether the claimed advantages are load-bearing.

Authors: The evaluation is deliberately qualitative because many candidate paradigms remain at low technological maturity with sparse public quantitative data. We accept that the absence of specific references and explicit criteria reduces actionability. In the revised manuscript we will add citations to published implementations and benchmarks for the discussed hardware paradigms and will articulate more explicit (still qualitative) criteria for per-node expressivity and bandwidth. Quantitative head-to-head comparisons or falsifiable predictions are outside the current scope and would require new experimental work. revision: partial

Circularity Check

0 steps flagged

No significant circularity

full rationale

The paper is a high-level conceptual proposal that reasons by analogy from properties of software localised ML models on small datasets to potential advantages in hardware ML architectures. No equations, fitted parameters, quantitative predictions, or self-citations appear in the provided text. The central claim is explicitly framed as the 'potential' for localised designs to offer interpretability and efficiency benefits, without any reduction of results to inputs by definition or prior self-reference. The argument evaluates hardware paradigms at a conceptual level without load-bearing internal dependencies.

Axiom & Free-Parameter Ledger

0 free parameters · 2 axioms · 0 invented entities

The paper rests on the untested transfer of software-localisation benefits to hardware and on the assumption that interpretability correlates directly with localisation and per-node expressivity. No free parameters or invented entities are introduced.

axioms (2)

domain assumption Localised ML models are more interpretable and computationally efficient than deep neural networks on small datasets
Invoked in the abstract as the basis for the hardware analogy.
ad hoc to paper Hardware implementations can preserve the interpretability advantages of localised software models
The translation from software observation to hardware architecture is assumed without further justification.

pith-pipeline@v0.9.1-grok · 5716 in / 1312 out tokens · 14062 ms · 2026-06-27T20:19:06.352590+00:00 · methodology

discussion (0)

Reference graph

Works this paper leans on

15 extracted references · 10 canonical work pages

[1]

A Brief History of Artificial Intelligence: On the Past, Present, and Future of Artificial Intelligence

(1) Haenlein, M.; Kaplan, A. A Brief History of Artificial Intelligence: On the Past, Present, and Future of Artificial Intelligence. Calif. Manage. Rev. 2019, 61 (4), 5–14. https://doi.org/10.1177/0008125619864925. (2) Raina, R.; Madhavan, A.; Ng, A. Y. Large-Scale Deep Unsupervised Learning Using Graphics Processors. In Proceedings of the 26th annual in...

work page doi:10.1177/0008125619864925 2019
[2]

R.; Rieser, V.; Gabriel, I

(10) Manzini, A.; Keeling, G.; Marchal, N.; McKee, K. R.; Rieser, V.; Gabriel, I. Should Users Trust Advanced AI Assistants? Justified Trust as a Function of Competence and Alignment; 2024; pp 1174–1186. (11) Bereska, L.; Gavves, E. Mechanistic Interpretability for AI Safety--a Review. ArXiv Prepr. ArXiv240414082

2024
[3]

(13) Weidinger, L.; Mellor, J.; Rauh, M.; Griffin, C.; Uesato, J.; Huang, P.-S.; Cheng, M.; Glaese, M.; Balle, B.; Kasirzadeh, A

https://arxiv.org/abs/2209.00626. (13) Weidinger, L.; Mellor, J.; Rauh, M.; Griffin, C.; Uesato, J.; Huang, P.-S.; Cheng, M.; Glaese, M.; Balle, B.; Kasirzadeh, A. Ethical and Social Risks of Harm from Language Models. ArXiv Prepr. ArXiv211204359

work page arXiv
[4]

Riccardo Guidotti, Anna Monreale, Salvatore Ruggieri, Franco Turini, Fosca Giannotti, and Dino Pedreschi

(14) Gunning, D.; Stefik, M.; Choi, J.; Miller, T.; Stumpf, S.; Yang, G.-Z. XAI—Explainable Artificial Intelligence. Sci. Robot. 2019, 4 (37), eaay7120. https://doi.org/10.1126/scirobotics.aay7120. (15) Miller, T. Explanation in Artificial Intelligence: Insights from the Social Sciences. Artif. Intell. 2019, 267, 1–38. https://doi.org/https://doi.org/10.1...

work page doi:10.1126/scirobotics.aay7120 2019
[5]

Causal Abstraction: A Theoretical Foundation for Mechanistic Interpretability

(17) Geiger, A.; Ibeling, D.; Zur, A.; Chaudhary, M.; Chauhan, S.; Huang, J.; Arora, A.; Wu, Z.; Goodman, N.; Potts, C. Causal Abstraction: A Theoretical Foundation for Mechanistic Interpretability. J. Mach. Learn. Res. 2025, 26 (83), 1–64. (18) Kästner, L.; Crook, B. Explaining AI through Mechanistic Interpretability. Eur. J. Philos. Sci. 2024, 14 (4),

2025
[6]

(19) Bechtel, W.; Richardson, R

https://doi.org/10.1007/s13194-024-00614-4. (19) Bechtel, W.; Richardson, R. C. Discovering Complexity: Decomposition and Localization as Strategies in Scientific Research; MIT press,

work page doi:10.1007/s13194-024-00614-4
[7]

(21) Wood, S. N. Generalized Additive Models. Annual Review of Statistics and Its Application, 2025, 12, 497–526. https://doi.org/https://doi.org/10.1146/annurev- statistics-112723-034249. (22) Doohan, J.; Kook, L.; Burke, K. Comparison of Generalised Additive Models and Neural Networks in Applications: A Systematic Review. Expert Syst. Appl. 2026, 131082...

work page doi:10.1146/annurev- 2025
[8]

Deep Neural Networks and Tabular Data: A Survey

(27) Borisov, V.; Leemann, T.; Seßler, K.; Haug, J.; Pawelczyk, M.; Kasneci, G. Deep Neural Networks and Tabular Data: A Survey. IEEE Trans. Neural Netw. Learn. Syst. 2022, 35 (6), 7499–7519. (28) Lundberg, S. M.; Lee, S.-I. A Unified Approach to Interpreting Model Predictions. In Proceedings of the 31st International Conference on Neural Information Proc...

2022
[9]

A study on the Interpretability of Neural Retrieval Models using DeepSHAP , url=

(30) Fernando, Z. T.; Singh, J.; Anand, A. A Study on the Interpretability of Neural Retrieval Models Using DeepSHAP. In Proceedings of the 42nd International ACM SIGIR Conference on Research and Development in Information Retrieval; SIGIR’19; Association for Computing Machinery: New York, NY, USA, 2019; pp 1005–1008. https://doi.org/10.1145/3331184.33313...

work page doi:10.1145/3331184.3331312 2019
[10]

A Survey of Techniques for Optimizing Deep Learning on GPUs

(36) Mittal, S.; Vaishay, S. A Survey of Techniques for Optimizing Deep Learning on GPUs. J. Syst. Archit. 2019, 99, 101635. https://doi.org/https://doi.org/10.1016/j.sysarc.2019.101635. (37) Wen, Z.; He, B.; Kotagiri, R.; Lu, S.; Shi, J. Efficient Gradient Boosted Decision Tree Training on GPUs. In 2018 IEEE International Parallel and Distributed Process...

work page doi:10.1016/j.sysarc.2019.101635 2019
[11]

Dendritic Computing: Branching Deeper into Machine Learning

(40) Acharya, J.; Basu, A.; Legenstein, R.; Limbacher, T.; Poirazi, P.; Wu, X. Dendritic Computing: Branching Deeper into Machine Learning. Neuroscience 2022, 489, 275–289. https://doi.org/https://doi.org/10.1016/j.neuroscience.2021.10.001. (41) Perlmutter, J. S.; Mink, J. W. Deep Brain Stimulation. Annu Rev Neurosci 2006, 29, 229–257. (42) Chaudhari, S.;...

work page doi:10.1016/j.neuroscience.2021.10.001 2022
[12]

The Non-Linear Representation Dilemma: Is Causal Abstraction Enough for Mechanistic Interpretability? Adv

(47) Sutter, D.; Minder, J.; Hofmann, T.; Pimentel, T. The Non-Linear Representation Dilemma: Is Causal Abstraction Enough for Mechanistic Interpretability? Adv. Neural Inf. Process. Syst. 2026, 38, 149455–149503. (48) Arditi, A.; Obeso, O.; Syed, A.; Paleka, D.; Panickssery, N.; Gurnee, W.; Nanda, N. Refusal in Language Models Is Mediated by a Single Dir...

2026
[13]

J.; Carta, F.; Fagbohungbe, O.; Gokmen, T

(52) Rasch, M. J.; Carta, F.; Fagbohungbe, O.; Gokmen, T. Fast and Robust Analog In- Memory Deep Neural Network Training. Nat. Commun. 2024, 15 (1),

2024
[14]

(53) Beniaguev, D.; Segev, I.; London, M

https://doi.org/10.1038/s41467-024-51221-z. (53) Beniaguev, D.; Segev, I.; London, M. Single Cortical Neurons as Deep Artificial Neural Networks. Neuron 2021, 109 (17), 2727-2739.e3. https://doi.org/https://doi.org/10.1016/j.neuron.2021.07.002. (54) Kiener, M.; Bozenhard, J.; Kutyniok, G.; Nyholm, S. The Ethics of Analog AI. AI Ethics 2026, 6 (1),

work page doi:10.1038/s41467-024-51221-z 2021
[15]

Electrochemical- Memristor-Based Artificial Neurons and Synapses-Fundamentals, Applications, and Challenges

(55) Chen, S.; Zhang, T.; Tappertzhofen, S.; Yang, Y.; Valov, I. Electrochemical- Memristor-Based Artificial Neurons and Synapses-Fundamentals, Applications, and Challenges. Adv. Mater. Deerfield Beach Fla 2023, 35 (37), e2301924. https://doi.org/10.1002/adma.202301924. (56) Flood, E.; Boiteux, C.; Lev, B.; Vorobyov, I.; Allen, T. W. Atomistic Simulations...

work page doi:10.1002/adma.202301924 2023

[1] [1]

A Brief History of Artificial Intelligence: On the Past, Present, and Future of Artificial Intelligence

(1) Haenlein, M.; Kaplan, A. A Brief History of Artificial Intelligence: On the Past, Present, and Future of Artificial Intelligence. Calif. Manage. Rev. 2019, 61 (4), 5–14. https://doi.org/10.1177/0008125619864925. (2) Raina, R.; Madhavan, A.; Ng, A. Y. Large-Scale Deep Unsupervised Learning Using Graphics Processors. In Proceedings of the 26th annual in...

work page doi:10.1177/0008125619864925 2019

[2] [2]

R.; Rieser, V.; Gabriel, I

(10) Manzini, A.; Keeling, G.; Marchal, N.; McKee, K. R.; Rieser, V.; Gabriel, I. Should Users Trust Advanced AI Assistants? Justified Trust as a Function of Competence and Alignment; 2024; pp 1174–1186. (11) Bereska, L.; Gavves, E. Mechanistic Interpretability for AI Safety--a Review. ArXiv Prepr. ArXiv240414082

2024

[3] [3]

(13) Weidinger, L.; Mellor, J.; Rauh, M.; Griffin, C.; Uesato, J.; Huang, P.-S.; Cheng, M.; Glaese, M.; Balle, B.; Kasirzadeh, A

https://arxiv.org/abs/2209.00626. (13) Weidinger, L.; Mellor, J.; Rauh, M.; Griffin, C.; Uesato, J.; Huang, P.-S.; Cheng, M.; Glaese, M.; Balle, B.; Kasirzadeh, A. Ethical and Social Risks of Harm from Language Models. ArXiv Prepr. ArXiv211204359

work page arXiv

[4] [4]

Riccardo Guidotti, Anna Monreale, Salvatore Ruggieri, Franco Turini, Fosca Giannotti, and Dino Pedreschi

(14) Gunning, D.; Stefik, M.; Choi, J.; Miller, T.; Stumpf, S.; Yang, G.-Z. XAI—Explainable Artificial Intelligence. Sci. Robot. 2019, 4 (37), eaay7120. https://doi.org/10.1126/scirobotics.aay7120. (15) Miller, T. Explanation in Artificial Intelligence: Insights from the Social Sciences. Artif. Intell. 2019, 267, 1–38. https://doi.org/https://doi.org/10.1...

work page doi:10.1126/scirobotics.aay7120 2019

[5] [5]

Causal Abstraction: A Theoretical Foundation for Mechanistic Interpretability

(17) Geiger, A.; Ibeling, D.; Zur, A.; Chaudhary, M.; Chauhan, S.; Huang, J.; Arora, A.; Wu, Z.; Goodman, N.; Potts, C. Causal Abstraction: A Theoretical Foundation for Mechanistic Interpretability. J. Mach. Learn. Res. 2025, 26 (83), 1–64. (18) Kästner, L.; Crook, B. Explaining AI through Mechanistic Interpretability. Eur. J. Philos. Sci. 2024, 14 (4),

2025

[6] [6]

(19) Bechtel, W.; Richardson, R

https://doi.org/10.1007/s13194-024-00614-4. (19) Bechtel, W.; Richardson, R. C. Discovering Complexity: Decomposition and Localization as Strategies in Scientific Research; MIT press,

work page doi:10.1007/s13194-024-00614-4

[7] [7]

(21) Wood, S. N. Generalized Additive Models. Annual Review of Statistics and Its Application, 2025, 12, 497–526. https://doi.org/https://doi.org/10.1146/annurev- statistics-112723-034249. (22) Doohan, J.; Kook, L.; Burke, K. Comparison of Generalised Additive Models and Neural Networks in Applications: A Systematic Review. Expert Syst. Appl. 2026, 131082...

work page doi:10.1146/annurev- 2025

[8] [8]

Deep Neural Networks and Tabular Data: A Survey

(27) Borisov, V.; Leemann, T.; Seßler, K.; Haug, J.; Pawelczyk, M.; Kasneci, G. Deep Neural Networks and Tabular Data: A Survey. IEEE Trans. Neural Netw. Learn. Syst. 2022, 35 (6), 7499–7519. (28) Lundberg, S. M.; Lee, S.-I. A Unified Approach to Interpreting Model Predictions. In Proceedings of the 31st International Conference on Neural Information Proc...

2022

[9] [9]

A study on the Interpretability of Neural Retrieval Models using DeepSHAP , url=

(30) Fernando, Z. T.; Singh, J.; Anand, A. A Study on the Interpretability of Neural Retrieval Models Using DeepSHAP. In Proceedings of the 42nd International ACM SIGIR Conference on Research and Development in Information Retrieval; SIGIR’19; Association for Computing Machinery: New York, NY, USA, 2019; pp 1005–1008. https://doi.org/10.1145/3331184.33313...

work page doi:10.1145/3331184.3331312 2019

[10] [10]

A Survey of Techniques for Optimizing Deep Learning on GPUs

(36) Mittal, S.; Vaishay, S. A Survey of Techniques for Optimizing Deep Learning on GPUs. J. Syst. Archit. 2019, 99, 101635. https://doi.org/https://doi.org/10.1016/j.sysarc.2019.101635. (37) Wen, Z.; He, B.; Kotagiri, R.; Lu, S.; Shi, J. Efficient Gradient Boosted Decision Tree Training on GPUs. In 2018 IEEE International Parallel and Distributed Process...

work page doi:10.1016/j.sysarc.2019.101635 2019

[11] [11]

Dendritic Computing: Branching Deeper into Machine Learning

(40) Acharya, J.; Basu, A.; Legenstein, R.; Limbacher, T.; Poirazi, P.; Wu, X. Dendritic Computing: Branching Deeper into Machine Learning. Neuroscience 2022, 489, 275–289. https://doi.org/https://doi.org/10.1016/j.neuroscience.2021.10.001. (41) Perlmutter, J. S.; Mink, J. W. Deep Brain Stimulation. Annu Rev Neurosci 2006, 29, 229–257. (42) Chaudhari, S.;...

work page doi:10.1016/j.neuroscience.2021.10.001 2022

[12] [12]

The Non-Linear Representation Dilemma: Is Causal Abstraction Enough for Mechanistic Interpretability? Adv

(47) Sutter, D.; Minder, J.; Hofmann, T.; Pimentel, T. The Non-Linear Representation Dilemma: Is Causal Abstraction Enough for Mechanistic Interpretability? Adv. Neural Inf. Process. Syst. 2026, 38, 149455–149503. (48) Arditi, A.; Obeso, O.; Syed, A.; Paleka, D.; Panickssery, N.; Gurnee, W.; Nanda, N. Refusal in Language Models Is Mediated by a Single Dir...

2026

[13] [13]

J.; Carta, F.; Fagbohungbe, O.; Gokmen, T

(52) Rasch, M. J.; Carta, F.; Fagbohungbe, O.; Gokmen, T. Fast and Robust Analog In- Memory Deep Neural Network Training. Nat. Commun. 2024, 15 (1),

2024

[14] [14]

(53) Beniaguev, D.; Segev, I.; London, M

https://doi.org/10.1038/s41467-024-51221-z. (53) Beniaguev, D.; Segev, I.; London, M. Single Cortical Neurons as Deep Artificial Neural Networks. Neuron 2021, 109 (17), 2727-2739.e3. https://doi.org/https://doi.org/10.1016/j.neuron.2021.07.002. (54) Kiener, M.; Bozenhard, J.; Kutyniok, G.; Nyholm, S. The Ethics of Analog AI. AI Ethics 2026, 6 (1),

work page doi:10.1038/s41467-024-51221-z 2021

[15] [15]

Electrochemical- Memristor-Based Artificial Neurons and Synapses-Fundamentals, Applications, and Challenges

(55) Chen, S.; Zhang, T.; Tappertzhofen, S.; Yang, Y.; Valov, I. Electrochemical- Memristor-Based Artificial Neurons and Synapses-Fundamentals, Applications, and Challenges. Adv. Mater. Deerfield Beach Fla 2023, 35 (37), e2301924. https://doi.org/10.1002/adma.202301924. (56) Flood, E.; Boiteux, C.; Lev, B.; Vorobyov, I.; Allen, T. W. Atomistic Simulations...

work page doi:10.1002/adma.202301924 2023