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A Space-Efficient Design for Reversible Floating Point Adder in Quantum Computing
Quantum Physics · Submitted 17 Jun 2013
abstract compiled · 2026-09-23 · no language-model review
The authors' main claim In this paper we propose a space-efficient reversible floating-point adder, suitable for binary quantum computation, improving the design of Nachtigal et al. Our work focuses on improving the reversible designs of the alignment unit and the normalization unit, which are the most expensive parts.
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The abstract, sentence by sentence
Reversible logic has applications in low-power computing and quantum computing. However, there are few existing designs for reversible floating-point adders and none suitable for quantum computation. In this paper we propose a space-efficient reversible floating-point adder, suitable for binary quantum computation, improving the design of Nachtigal et al. Our work focuses on improving the reversible designs of the alignment unit and the normalization unit, which are the most expensive parts. By changing a few elements of the existing algorithm, including the circuit designs of the RLZC (reversible leading zero counter) and converter, we have reduced the cost about 68%. We also propose fault-tolerant designs for the circuits. The KQ for our fault-tolerant design is almost sixty times as expensive as for a 32-bit fixed-point addition. We note that the floating-point representation makes in-place, truly reversible arithmetic impossible, requiring us to retain both inputs, which limits the sustainability of its use for quantum computation.
background contribution method result interpretation main claim
| # | sentence | role | the authors' own work | states the main conclusion | strength |
|---|---|---|---|---|---|
| s0 | Reversible logic has applications in low-power computing and quantum computing. | background 1.00 | 0.06 | 0.02 | asserted 1.00 |
| s1 | However, there are few existing designs for reversible floating-point adders and none suitable for quantum computation. | gap 1.00 | 0.09 | 0.03 | asserted 1.00 |
| s2 | In this paper we propose a space-efficient reversible floating-point adder, suitable for binary quantum computation, improving the design of Nachtigal et al. Our work focuses on improving the reversible designs of the alignment unit and the normalization unit, which are the most expensive parts. | contribution 1.00 | 0.91 | 0.31 | asserted 1.00 |
| s3 | By changing a few elements of the existing algorithm, including the circuit designs of the RLZC (reversible leading zero counter) and converter, we have reduced the cost about 68%. | result 0.85 | 0.95 | 0.32 | asserted 1.00 |
| s4 | We also propose fault-tolerant designs for the circuits. | contribution 0.99 | 0.93 | 0.06 | asserted 1.00 |
| s5 | The KQ for our fault-tolerant design is almost sixty times as expensive as for a 32-bit fixed-point addition. | result 0.88 | 0.85 | 0.08 | asserted 0.99 |
| s6 | We note that the floating-point representation makes in-place, truly reversible arithmetic impossible, requiring us to retain both inputs, which limits the sustainability of its use for quantum computation. | limitation 1.00 | 0.68 | 0.36 | asserted 1.00 |
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The paper
Original abstract
Reversible logic has applications in low-power computing and quantum computing. However, there are few existing designs for reversible floating-point adders and none suitable for quantum computation. In this paper we propose a space-efficient reversible floating-point adder, suitable for binary quantum computation, improving the design of Nachtigal et al. Our work focuses on improving the reversible designs of the alignment unit and the normalization unit, which are the most expensive parts. By changing a few elements of the existing algorithm, including the circuit designs of the RLZC (reversible leading zero counter) and converter, we have reduced the cost about 68%. We also propose fault-tolerant designs for the circuits. The KQ for our fault-tolerant design is almost sixty times as expensive as for a 32-bit fixed-point addition. We note that the floating-point representation makes in-place, truly reversible arithmetic impossible, requiring us to retain both inputs, which limits the sustainability of its use for quantum computation.
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How the literature uses it
2 arXiv papers cite this in 2 sentences
What it cites · 1 sentence without a confident label
Compares with 1 paper
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This compares to a KQ for a 32-bit CDKM ripple-carry adder [ref] of 12,474.
A new quantum ripple-carry addition circuit · Metrics for Fault-Tolerant Quantum Circuit · 0.98
Cites as background 1 paper
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In fault-tolerant quantum computation [ref] , we often use another set of gates to build up circuits.
Fault-tolerant quantum computation · Metrics for Evaluating Quantum Circuits · 0.96
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