Screening limited switching performance of multilayer 2D semiconductor FETs: the case for SnS

Gate tunable p-type multilayer tin mono-sulfide (SnS) field-effect transistor (FET) devices with SnS thickness between 50 and 100 nm were fabricated and studied to understand their performances. The devices showed anisotropic inplane conductance and room temperature field effect mobilities ~5 - 10 cm$^2$/Vs. However, the devices showed appreciable OFF state conductance and an ON-OFF ratio ~10 at room temperature. The weak gate tuning behavior in the depletion regime of SnS devices is explained by the finite carrier screening length effect which causes the existence of a conductive surface layer from intrinsic defects induced holes in SnS. Through etching and n-type surface doping by Cs2CO3 to reduce/compensate the not-gatable holes near SnS flake's top surface, the devices gained an order of magnitude improvement in the ON-OFF ratio and hole Hall mobility ~ 100 cm$^2$/Vs at room temperature is observed. This work suggests that in order to obtain effective switching and low OFF state power consumption, two-dimensional (2D) semiconductor based depletion mode FETs should limit their thickness to within the Debye screening length of carriers in the semiconductor.