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Integrated silicon qubit platform with single-spin addressability, exchange control and robust single-shot singlet-triplet readout

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arxiv 1708.03445 v2 pith:L6RIN2Q4 submitted 2017-08-11 quant-ph

Integrated silicon qubit platform with single-spin addressability, exchange control and robust single-shot singlet-triplet readout

classification quant-ph
keywords controlspinquantumsiliconplatformqubitsresonancesingle-spin
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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Silicon quantum dot spin qubits provide a promising platform for large-scale quantum computation because of their compatibility with conventional CMOS manufacturing and the long coherence times accessible using $^{28}$Si enriched material. A scalable error-corrected quantum processor, however, will require control of many qubits in parallel, while performing error detection across the constituent qubits. Spin resonance techniques are a convenient path to parallel two-axis control, while Pauli spin blockade can be used to realize local parity measurements for error detection. Despite this, silicon qubit implementations have so far focused on either single-spin resonance control, or control and measurement via voltage-pulse detuning in the two-spin singlet-triplet basis, but not both simultaneously. Here, we demonstrate an integrated device platform incorporating a silicon metal-oxide-semiconductor double quantum dot that is capable of single-spin addressing and control via electron spin resonance, combined with high-fidelity spin readout in the singlet-triplet basis.

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