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Scalable Superconductor Neuron with Ternary Synaptic Connections for Ultra-Fast SNN Hardware

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arxiv 2402.16384 v2 pith:RXEZ2U2N submitted 2024-02-26 cond-mat.supr-con cs.ETcs.NE

Scalable Superconductor Neuron with Ternary Synaptic Connections for Ultra-Fast SNN Hardware

classification cond-mat.supr-con cs.ETcs.NE
keywords neuronsynapticdesignnetworksuperconductorconnectionsinferenceaccelerators
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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A novel high-fan-in differential superconductor neuron structure designed for ultra-high-performance Spiking Neural Network (SNN) accelerators is presented. Utilizing a high-fan-in neuron structure allows us to design SNN accelerators with more synaptic connections, enhancing the overall network capabilities. The proposed neuron design is based on superconductor electronics fabric, incorporating multiple superconducting loops, each with two Josephson Junctions. This arrangement enables each input data branch to have positive and negative inductive coupling, supporting excitatory and inhibitory synaptic data. Compatibility with synaptic devices and thresholding operation is achieved using a single flux quantum (SFQ) pulse-based logic style. The neuron design, along with ternary synaptic connections, forms the foundation for a superconductor-based SNN inference. To demonstrate the capabilities of our design, we train the SNN using snnTorch, augmenting the PyTorch framework. After pruning, the demonstrated SNN inference achieves an impressive 96.1% accuracy on MNIST images. Notably, the network exhibits a remarkable throughput of 8.92 GHz while consuming only 1.5 nJ per inference, including the energy consumption associated with cooling to 4K. These results underscore the potential of superconductor electronics in developing high-performance and ultra-energy-efficient neural network accelerator architectures.

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