Paper Citation Record · LEDGER

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators

As of 13 August 2026, this Paper Citation Record lists 31 of 31 outbound references and 0 inbound Pith citation observations for arXiv:2411.13054.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2411.13054 v1

Coverage vector

measured 31 of 31 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-12T16:58:15.719784Z

measured 31 of 31 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-12T06:34:41.77262+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

31 of 31 outbound references displayed

verified exact0
verified fuzzy30
unresolved1
parse uncertain0
malformed identifier0
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External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 7eca4275-17a9-49e9-99db-0a0df4b2c361 · outbound

This paper cites OverlaPIM: Overlap optimization for processing in-memory neural network acceleration,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators OverlaPIM: Overlap optimization for processing in-memory neural network acceleration,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:16.031252Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation efb35ac3-4ef2-4e0c-ae43-09cd1c6efc1f · outbound

This paper cites Gnndrive: Reducing memory contention and i/o congestion for disk-based gnn training,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Gnndrive: Reducing memory contention and i/o congestion for disk-based gnn training,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:16.021499Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 11e0c85b-b71b-4e99-817d-454a9a30936e · outbound

This paper cites Illusion of large on-chip memory by networked computing chips for neural network inference,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Illusion of large on-chip memory by networked computing chips for neural network inference,

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:16.011693Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation fee89178-e8a4-4165-aa1f-a7e745df92d0 · outbound

This paper cites Caffeine: Toward uniformed representation and acceleration for deep convolutional neural networks,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Caffeine: Toward uniformed representation and acceleration for deep convolutional neural networks,

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:16.001977Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation b02ef922-7555-4795-a9b5-03db0cd3bc99 · outbound

This paper cites A 12nm linux-smp-capable risc-v soc with 14 accelerator types, distributed hardware power management, and flexible noc-based data orchestration,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators A 12nm linux-smp-capable risc-v soc with 14 accelerator types, distributed hardware power management, and flexible noc-based data orchestration,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.992698Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation b001cfe2-cabc-418c-a1fb-02382d3a038c · outbound

This paper cites Design and implementation of deep learning 2D convolutions on modern CPUs,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Design and implementation of deep learning 2D convolutions on modern CPUs,

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.983410Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 88db6d77-3e7a-4613-8e31-8db5bc792312 · outbound

This paper cites Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for cost-and energy-efficient inference at the edge,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for cost-and energy-efficient inference at the edge,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.974674Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 5889870f-0625-4b5b-8f6c-92e84d17e658 · outbound

This paper cites DaxVM: Stressing the limits of memory as a file interface,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators DaxVM: Stressing the limits of memory as a file interface,

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.965876Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 974a3856-8642-456f-b126-71aed5755586 · outbound

This paper cites Digital in-memory computing to accelerate deep learning inference on the edge,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Digital in-memory computing to accelerate deep learning inference on the edge,

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.957293Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 4c50542e-1bc7-48a7-9cd8-f50705f8b117 · outbound

This paper cites ReTransformer: ReRAM- based processing-in-memory architecture for transformer acceleration,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators ReTransformer: ReRAM- based processing-in-memory architecture for transformer acceleration,

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.948223Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation e2f04eae-6b9a-4c2e-820d-d8f9f59e3bca · outbound

This paper cites Lossless neural network model compression through exponent sharing,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Lossless neural network model compression through exponent sharing,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.939554Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 0be6549d-61d1-483d-903a-91f7aefd5292 · outbound

This paper cites Ssr: Spatial sequential hybrid architecture for latency through- put tradeoff in transformer acceleration,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Ssr: Spatial sequential hybrid architecture for latency through- put tradeoff in transformer acceleration,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.930693Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 4e2a9903-01ea-4d5a-9c75-a32c6442e0bb · outbound

This paper cites On ex- ploiting patterns for robust fpga-based multi-accelerator edge computing systems,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators On ex- ploiting patterns for robust fpga-based multi-accelerator edge computing systems,

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.921581Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 49708621-14c7-4ed6-bde0-56ee8f6c20c7 · outbound

This paper cites an unresolved cited work.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Unresolved cited work

Reference 14

Resolution: unresolved; raw_fallback, observed 2026-08-12T16:58:15.912823Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation f594f250-01b7-40a6-bb95-2bf27d1bc04d · outbound

This paper cites Analysis of the critical bits of a RISC-V processor implemented in an SRAM-based FPGA for space applications,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Analysis of the critical bits of a RISC-V processor implemented in an SRAM-based FPGA for space applications,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.904624Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 481f522c-c7ea-4a87-b4a2-0d38993266db · outbound

This paper cites PIMLC: Logic compiler for bit- serial based PIM,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators PIMLC: Logic compiler for bit- serial based PIM,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.895752Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 0e10294b-ef67-4599-b5c6-76c75b21b5d8 · outbound

This paper cites A 1-16b reconfig- urable 80kb 7T SRAM-based digital near-memory computing macro for processing neural networks,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators A 1-16b reconfig- urable 80kb 7T SRAM-based digital near-memory computing macro for processing neural networks,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.887316Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 69cfa663-19f9-4b17-aa5c-198bbec6bf04 · outbound

This paper cites A 1.041-Mb/mm 2 27.38- TOPS/W signed-INT8 dynamic-logic-based ADC-less SRAM compute- in-memory macro in 28nm with reconfigurable bitwise operation for AI and embedded applications,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators A 1.041-Mb/mm 2 27.38- TOPS/W signed-INT8 dynamic-logic-based ADC-less SRAM compute- in-memory macro in 28nm with reconfigurable bitwise operation for AI and embedded applications,

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.878458Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 1ef22367-4281-453c-8e40-0d66452f8810 · outbound

This paper cites A flash-SRAM-ADC-fused plastic computing-in-memory macro for learning in neural networks in a standard 14nm FinFET process,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators A flash-SRAM-ADC-fused plastic computing-in-memory macro for learning in neural networks in a standard 14nm FinFET process,

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.869972Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 54973343-9362-44a7-9d07-2e5c745a5c46 · outbound

This paper cites Probabilistic compute-in-memory design for efficient markov chain monte carlo sampling,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Probabilistic compute-in-memory design for efficient markov chain monte carlo sampling,

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.861200Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 027fef2e-a6bd-4d24-935e-0b2dd4cf4052 · outbound

This paper cites Parallelizing SRAM arrays with customized bit-cell for binary neural networks,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Parallelizing SRAM arrays with customized bit-cell for binary neural networks,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.851960Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation a0f66966-cf74-4e08-889c-0f8f5859eb5e · outbound

This paper cites Agile software-hardware co-design of ai-centric heterogeneous socs,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Agile software-hardware co-design of ai-centric heterogeneous socs,

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.842400Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 22285e50-48b2-4d46-b37f-c43652360510 · outbound

This paper cites Hypar: Towards hybrid parallelism for deep learning accelerator array,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Hypar: Towards hybrid parallelism for deep learning accelerator array,

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.833108Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation a5e8a2db-e871-4694-8e93-a05755225e3f · outbound

This paper cites Neural network training on in-memory- computing hardware with radix-4 gradients,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Neural network training on in-memory- computing hardware with radix-4 gradients,

Reference 24

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.822247Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation b9b677f6-d0f4-4aba-bfbe-9dd777867d51 · outbound

This paper cites Fpga/dnn co-design: An efficient design methodology for iot intelligence on the edge,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Fpga/dnn co-design: An efficient design methodology for iot intelligence on the edge,

Reference 25

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.812411Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 7f753db8-1595-42a2-accc-bc84f2e38c08 · outbound

This paper cites Cloud-dnn: An open framework for mapping dnn models to cloud fpgas,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Cloud-dnn: An open framework for mapping dnn models to cloud fpgas,

Reference 26

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.801879Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 9acbad7e-6957-495d-89a6-027df5d9931f · outbound

This paper cites Acgraph: Accelerating streaming graph processing via dependence hier- archy,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Acgraph: Accelerating streaming graph processing via dependence hier- archy,

Reference 27

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.791676Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation d4860e72-9af7-4e3c-ae88-675d78875894 · outbound

This paper cites Hardware/software co-design for machine learn- ing accelerators,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Hardware/software co-design for machine learn- ing accelerators,

Reference 28

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.781925Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 79bdbb47-33e7-45ef-9e9c-9d1aeb9fb59e · outbound

This paper cites PUMA: A programmable ultra-efficient memristor-based accelerator for machine learning inference,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators PUMA: A programmable ultra-efficient memristor-based accelerator for machine learning inference,

Reference 29

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.772289Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation f8544481-19e7-4da3-b2ed-4d1564a067f2 · outbound

This paper cites Hybrid-DBT: Hardware/software dynamic binary translation targeting VLIW,.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Hybrid-DBT: Hardware/software dynamic binary translation targeting VLIW,

Reference 30

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.762534Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 91cd331c-1c38-40a0-8ca2-26ba5d0f5f8e · outbound

This paper cites Blas (basic linear algebra subprograms),.

Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators Blas (basic linear algebra subprograms),

Reference 31

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T16:58:15.751395Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Pith citing papers

No inbound Pith citation observations are available.