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Room-temperature memristive switching between charge density wave states

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arxiv 2412.13094 v2 pith:CEJPWN7K submitted 2024-12-17 cond-mat.mtrl-sci

Room-temperature memristive switching between charge density wave states

R. Venturini , M. Rupnik , J. Ga\v{s}perlin , J. Lipi\v{c} , P. \v{S}utar , Y. Vaskivskyi , F. \v{S}\v{c}epanovi\'c , D. Grabnar
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D. Gole\v{z} D. Mihailovic
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classification cond-mat.mtrl-sci
keywords statesswitchingchargedensityelectricalelectronicmemristorpulses
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Control over charge density wave (CDW) states is technologically promising for the development of ultra-efficient memory devices. However, using electrical pulses for non-volatile resistance switching involving CDW states has so far been limited to cryogenic temperatures. In this work, we investigate a recently discovered layered semiconductor EuTe4, which exhibits the coexistence of distinct CDW orders. We report that electrical pulses can be used for excitation to non-equilibrium, yet stable electronic states across a broad temperature range from 6 K to 400 K. We find that switching occurs through a non-thermal pathway and is reversible via a thermal erase procedure. The resistance of the new electronic state is tunable by the pulse voltage, so the device acts as a memristor. Calculations show fixed bilayer CDW, whereas CDW in single layers shows bistability due to weak Eu-Te links. Low-voltage, fast, and energy-efficient CDW switching holds potential for memristor applications.

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Cited by 3 Pith papers

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  1. $R^2$-dLLM: Accelerating Diffusion Large Language Models via Spatio-Temporal Redundancy Reduction

    cs.CL 2026-04 unverdicted novelty 7.0

    R²-dLLM reduces dLLM decoding steps by up to 75% via spatio-temporal redundancy reduction while keeping generation quality competitive.

  2. Room-temperature multistage metastability in a moir\'e superstructure

    cond-mat.str-el 2026-04 unverdicted novelty 6.0

    Electrically switchable room-temperature multistage metastable states in EuTe4 arise from out-of-plane CDW phase switching in its moiré superstructure, enabling potential multi-bit nonvolatile memory.

  3. $R^2$-dLLM: Accelerating Diffusion Large Language Models via Spatio-Temporal Redundancy Reduction

    cs.CL 2026-04 conditional novelty 6.0

    Voltage pulses create nonvolatile, multi-state metastable CDW phases in bulk EuTe4 at room temperature via out-of-plane phase switching in its moiré superstructure.