A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions | Paper Citation Record

Observation 1867321e-44fa-4c6a-bc03-0d3cc2974d9f · outbound

This paper cites Cranelift Code Generator.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Cranelift Code Generator

Reference 1

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This paper cites The European Processor Initiative Accelerator Processor Stream.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions The European Processor Initiative Accelerator Processor Stream

Reference 2

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This paper cites GCC, the GNU Compiler Collection - GNU Project.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions GCC, the GNU Compiler Collection - GNU Project

Reference 3

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This paper cites High performance RISC-V CPUs.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions High performance RISC-V CPUs

Reference 4

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This paper cites Intel oneDNN.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Intel oneDNN

Reference 5

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This paper cites LLVM for PULP Platform Projects, Snitch RISC-V ISA Exten- sion Support, PULP Project.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions LLVM for PULP Platform Projects, Snitch RISC-V ISA Exten- sion Support, PULP Project

Reference 6

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This paper cites MLIR Documentation: linalg Dialect.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions MLIR Documentation: linalg Dialect

Reference 7

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This paper cites NVIDIA cuDNN.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions NVIDIA cuDNN

Reference 8

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This paper cites oneAPI Programming Model.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions oneAPI Programming Model

Reference 9

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This paper cites RISC-V Packed SIMD Extension.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions RISC-V Packed SIMD Extension

Reference 10

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This paper cites Snitch Cluster, PULP Project.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Snitch Cluster, PULP Project

Reference 11

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This paper cites Torch-MLIR.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Torch-MLIR

Reference 12

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This paper cites Verilator.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Verilator

Reference 13

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This paper cites xDSL: A Python Compiler Design Toolkit.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions xDSL: A Python Compiler Design Toolkit

Reference 14

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This paper cites XuanTie RISC-V ISA Extensions Specification.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions XuanTie RISC-V ISA Extensions Specification

Reference 15

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This paper cites Murray, Benoit Steiner, Paul Tucker, Vijay Va- sudevan, Pete Warden, Martin Wicke, Yuan Yu, and Xiaoqiang Zheng.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Murray, Benoit Steiner, Paul Tucker, Vijay Va- sudevan, Pete Warden, Martin Wicke, Yuan Yu, and Xiaoqiang Zheng

Reference 16

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This paper cites 2001.Optimizing Compilers for Modern Architectures: A Dependence-based Approach(1 ed.).

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions 2001.Optimizing Compilers for Modern Architectures: A Dependence-based Approach(1 ed.)

Reference 17

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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This paper cites High Performance Code Generation in MLIR: An Early Case Study with GEMM.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions High Performance Code Generation in MLIR: An Early Case Study with GEMM

Reference 20

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 21

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Learning to Optimize Tensor Programs

Reference 26

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions cuDNN: Efficient Primitives for Deep Learning

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Sidekick compilation with xDSL

Reference 31

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Gürkay- nak, and Luca Benini

Reference 34

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions van de Geijn

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Hennessy and David A

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Compiling ONNX Neural Network Models Using MLIR

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Sadayappan

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions A Multi-Level Compiler Backend for Accelerated Micro-kernels Targetting RISC-V ISA Extensions

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

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Reference 58

Resolution: unresolved; raw_fallback, observed 2026-08-08T23:48:55.409280Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 3b2d5078-63f5-43df-928a-b194b49b4739 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 59

Resolution: unresolved; no resolver link, observed 2026-08-08T23:48:51.682498Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 536a74c9-7d63-4bc8-82a5-5bad0e286c82 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 60

Resolution: unresolved; raw_fallback, observed 2026-08-08T23:48:55.369748Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 58efdb77-c94b-4005-b3c8-02896418d4df · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 61

Resolution: unresolved; no resolver link, observed 2026-08-08T23:48:51.697415Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1369012a-1f0f-4d8c-9f28-89eef3d239df · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 62

Resolution: unresolved; raw_fallback, observed 2026-08-08T23:48:55.355789Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation f2329fb6-b4a7-467c-900a-085b58f94d6b · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 63

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 1396ac95-6aff-4e14-812f-27c26c75ac29 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 64

Resolution: unresolved; no resolver link, observed 2026-08-08T23:48:51.711279Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9fb0529a-174e-47e9-841e-5ae64e30d01f · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 65

Resolution: unresolved; raw_fallback, observed 2026-08-08T23:48:55.341744Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 6ed17099-f643-4851-ab27-01d6944d8d5e · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 66

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Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 8e4499c8-46e5-4ed0-adf9-723864f9df00 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 67

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 65c58352-e228-4edf-aa4f-16368c992ead · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 68

Resolution: unresolved; raw_fallback, observed 2026-08-08T23:48:55.327349Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation d98ffdf2-16ce-4795-9fc9-ec42d97af2b4 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 69

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 72a52fec-4cdd-4358-a817-50a7959568e4 · outbound

This paper cites Sadayappan, and Fabrice Rastello.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Sadayappan, and Fabrice Rastello

Reference 70

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation a636035c-6dfa-4322-8730-97197461696d · outbound

This paper cites Van Zee, Tyler M.

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Reference 71

Resolution: verified exact; doi, observed 2026-08-08T23:48:51.926148Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation e6044230-6e77-4765-b459-4f99c69c8716 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 72

Resolution: unresolved; raw_fallback, observed 2026-08-08T23:48:55.277662Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation d3fb5086-52d9-4e37-82ad-484a0793c7ff · outbound

This paper cites Composable and Modular Code Generation in MLIR: A Structured and Retargetable Approach to Tensor Compiler Construction.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Composable and Modular Code Generation in MLIR: A Structured and Retargetable Approach to Tensor Compiler Construction

Reference 73

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation f88cedfb-c3e5-41a6-ae2c-e66cf93d65df · outbound

This paper cites Profiling-Assisted Decoupled Access-Execute.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Profiling-Assisted Decoupled Access-Execute

Reference 74

Resolution: verified exact; local_arxiv, observed 2026-08-08T23:48:52.792965Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation b7ad92b6-05f7-4943-85f7-538bbb766f68 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 75

Resolution: unresolved; raw_fallback, observed 2026-08-08T23:48:55.261981Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation e89fadd8-7758-421e-8e00-1730f5b4ea32 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 76

Resolution: unresolved; raw_fallback, observed 2026-08-08T23:48:55.243518Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation c5f30a27-2530-4496-bd88-76625002044d · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 77

Resolution: verified exact; doi, observed 2026-08-08T23:48:51.885399Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 9de91498-8deb-43e9-afa7-174c8458ae49 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 78

Resolution: unresolved; raw_fallback, observed 2026-08-08T23:48:55.226853Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 92521b55-5236-41fc-8ea5-4997988b036c · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 79

Resolution: malformed identifier; arxiv_id_nonexistent, observed 2026-08-08T23:48:52.533688Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation b65872c9-ba3e-4645-8102-b455a5609669 · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 80

Resolution: verified exact; arxiv_id_nonexistent, observed 2026-08-08T23:48:52.322706Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation f4eefe06-a5aa-4bc0-bf8b-508d66c92eff · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 81

Resolution: unresolved; no resolver link, observed 2026-08-08T23:48:51.824119Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 8090f09b-72bc-4970-a97d-755a2ea74d2b · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 179

Resolution: verified exact; arxiv_id_nonexistent, observed 2026-08-08T23:48:52.770751Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 9d8bf7f7-b6eb-4bc1-9c1b-b7a00cb53f0e · outbound

This paper cites an unresolved cited work.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Unresolved cited work

Reference 262

Resolution: unresolved; no resolver link, observed 2026-08-08T23:48:51.580233Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f47e13af-e8ea-4f08-964b-dbd721f1b47e · outbound

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A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Zakharov-Ito equation and Generalized Heisenberg ferromagnet-type equation: equivalence and related geometric curve flows

Reference 2004

Resolution: unresolved; no resolver link, observed 2026-08-08T23:48:51.648670Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c28217c0-69ec-440f-9994-3ce9b29c0b65 · outbound

This paper cites Research Report.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions Research Report

Reference 2005

Resolution: verified fuzzy; raw_fallback, observed 2026-08-08T23:48:55.505786Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation de636524-6002-4fe6-873d-7091ac23f52a · outbound

This paper cites In 12th USENIX Symposium on Operating Systems Design and Implemen- tation (OSDI 16).

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions In 12th USENIX Symposium on Operating Systems Design and Implemen- tation (OSDI 16)

Reference 2016

Resolution: verified fuzzy; raw_fallback, observed 2026-08-08T23:48:55.552471Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation f77e909a-8fd5-4165-a690-ed4b9855ddf1 · outbound

This paper cites In Advances in Neural Information Processing Systems , Vol.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions In Advances in Neural Information Processing Systems , Vol

Reference 2019

Resolution: verified fuzzy; raw_fallback, observed 2026-08-08T23:48:55.384531Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 13ff2ded-e344-4936-9063-dae6a2c09c07 · outbound

This paper cites IEEE Trans.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions IEEE Trans

Reference 2021

Resolution: unresolved; no resolver link, observed 2026-08-08T23:48:51.720970Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 81950f3c-47fa-441e-bc54-80641807b127 · outbound

This paper cites ACM Trans.

A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions ACM Trans

Reference 2023

Resolution: malformed identifier; raw_fallback, observed 2026-08-08T23:48:55.294566Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Coverage vector

Reference resolution

Outbound references

Pith citing papers