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arxiv: 2503.12946 · v2 · submitted 2025-03-17 · 💻 cs.AR · cs.AI

Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation

Yunqi Shi , Chengrui Gao , Wanqi Ren , Peng Xie , Siyuan Xu , Ke Xue , Mingxuan Yuan , Chao Qian
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Zhi-Hua Zhou
This is my paper

Pith reviewed 2026-05-22 23:55 UTC · model grok-4.3

classification 💻 cs.AR cs.AI
keywords 3D-ICbenchmarkbackend implementationPPA evaluationplacement algorithmsOpenROADwirelengththermal simulation
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The pith

Open3DBench supplies an open-source flow for 3D-IC backend design that reports over 50 percent area reduction versus 2D methods.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper introduces Open3DBench, a benchmark platform built on open flow scripts to evaluate 3D integrated circuit backend steps including partitioning, placement, routing, extraction, and thermal analysis. It supplies two placement approaches that together produce measured gains in area, wirelength, timing, and power over standard 2D designs. Experiments on the platform also show that shorter wirelength does not reliably deliver better overall power-performance-area results. The work positions the benchmark as a reproducible way to test 3D methods without relying solely on closed commercial tools.

Core claim

Open3DBench enables modular 3D-IC backend implementation and PPA evaluation on an open platform. Two placement algorithms are presented: Open3D-Tiling for regular macro placement and Open3D-DMP for cross-die co-placement. On test cases the flow records 51.19 percent area reduction, 24.06 percent wirelength reduction, 30.84 percent timing improvement, and 5.72 percent power reduction relative to 2D flows, while demonstrating that wirelength gains alone do not ensure PPA gains and therefore PPA-driven methods are required.

What carries the argument

Modular 3D-IC flow supporting partitioning, placement, 3D routing, RC extraction, and thermal simulation together with the Open3D-Tiling and Open3D-DMP placement algorithms.

If this is right

  • 3D-IC backend flows can deliver simultaneous reductions in area, wirelength, timing, and power.
  • Placement methods must optimize directly for PPA metrics rather than wirelength alone.
  • Standardized open benchmarks allow consistent comparison of 3D EDA techniques.
  • Modular integration of thermal simulation is feasible within open backend flows.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The benchmark could serve as a starting point for teams developing new 3D partitioning or routing heuristics.
  • Future extensions might add support for multi-tier stacking beyond two dies.
  • Widespread use could reduce reliance on proprietary 3D-IC tool suites for academic and small-team research.
  • The observation that wirelength and PPA are imperfectly correlated may guide placement research toward multi-objective optimizers.

Load-bearing premise

The open modular flow produces results that align with those from advanced 3D-IC design practices that combine commercial tools and custom scripts.

What would settle it

Running the same benchmark designs through a commercial 3D-IC tool chain and finding no area, timing, or power gains would falsify the reported improvements.

Figures

Figures reproduced from arXiv: 2503.12946 by Chao Qian, Chengrui Gao, Ke Xue, Mingxuan Yuan, Peng Xie, Siyuan Xu, Wanqi Ren, Yunqi Shi, Zhi-Hua Zhou.

Figure 1
Figure 1. Figure 1: The illustrations of micro-bumping, hybrid bonding, [PITH_FULL_IMAGE:figures/full_fig_p001_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Comparison of routing wirelength (rWL), WNS, and [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Overview of the proposed 3D backend implementation [PITH_FULL_IMAGE:figures/full_fig_p004_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: Illustration of our analytical pseudo-3D placement [PITH_FULL_IMAGE:figures/full_fig_p005_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: Correlation analysis between rWL and key performance metrics comparing 2D and 3D methods. We plot the improvement [PITH_FULL_IMAGE:figures/full_fig_p007_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: Correlation analysis between rWL and key performance metrics comparing two 3D methods. We plot the improvement [PITH_FULL_IMAGE:figures/full_fig_p007_6.png] view at source ↗
Figure 7
Figure 7. Figure 7: Heat map visualization of Hier-RTLMP-2D and [PITH_FULL_IMAGE:figures/full_fig_p008_7.png] view at source ↗
read the original abstract

This work introduces Open3DBench, an open-source 3D-IC backend implementation benchmark built upon the OpenROAD-flow-scripts framework, enabling comprehensive evaluation of power, performance, area, and thermal metrics. Our proposed flow supports modular integration of 3D partitioning, placement, 3D routing, RC extraction, and thermal simulation, aligning with advanced 3D flows that rely on commercial tools and in-house scripts. We present two foundational 3D placement algorithms: Open3D-Tiling, which emphasizes regular macro placement, and Open3D-DMP, which enhances wirelength optimization through cross-die co-placement with analytical placer DREAMPlace. Experimental results show significant improvements in area (51.19%), wirelength (24.06%), timing (30.84%), and power (5.72%) compared to 2D flows. The results also highlight that better wirelength does not necessarily lead to PPA gain, emphasizing the need of developing PPA-driven methods. Open3DBench offers a standardized, reproducible platform for evaluating 3D EDA methods, effectively bridging the gap between open-source tools and commercial solutions in 3D-IC design.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The paper introduces Open3DBench, an open-source 3D-IC backend benchmark built on OpenROAD-flow-scripts. It proposes two placement algorithms (Open3D-Tiling for regular macro placement and Open3D-DMP for cross-die wirelength optimization via DREAMPlace) and a modular flow supporting 3D partitioning, placement, 3D routing, RC extraction, and thermal simulation. Experimental results claim PPA gains versus 2D flows (area 51.19%, wirelength 24.06%, timing 30.84%, power 5.72%) and note that wirelength improvement does not guarantee PPA gains, positioning the benchmark as a reproducible platform bridging open-source and commercial 3D-IC flows.

Significance. If the open-source components fully implement the claimed modules without undisclosed commercial dependencies and the results prove reproducible, the work would deliver a valuable standardized benchmark and two baseline algorithms for 3D-IC research. The explicit release of the benchmark and algorithms constitutes a concrete strength that could enable community-driven PPA-driven method development.

major comments (2)
  1. [§3] §3 (Proposed Flow description): the assertion that the flow 'supports modular integration of 3D partitioning, placement, 3D routing, RC extraction, and thermal simulation' while aligning with commercial-tool flows does not map each module to its open-source implementation or identify any remaining commercial-tool fallbacks; this directly affects whether the reported PPA deltas can be attributed to the open-source methods alone.
  2. [§5] §5 (Experimental Results): the headline improvements (area 51.19%, wirelength 24.06%, timing 30.84%, power 5.72%) are reported without stating the number of test cases, statistical significance tests, run-to-run variance, or data-selection criteria, leaving the robustness of the cross-flow comparison unclear.
minor comments (2)
  1. Figure captions and axis labels should explicitly distinguish 2D baseline from the two 3D variants (Open3D-Tiling, Open3D-DMP) for immediate readability.
  2. Ensure first-use definitions for all acronyms (PPA, DMP, RC) and consistent notation for the two proposed algorithms across text and tables.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive comments, which highlight opportunities to improve transparency and robustness in the manuscript. We address each major comment below and will incorporate revisions to strengthen the paper.

read point-by-point responses

  1. Referee: [§3] §3 (Proposed Flow description): the assertion that the flow 'supports modular integration of 3D partitioning, placement, 3D routing, RC extraction, and thermal simulation' while aligning with commercial-tool flows does not map each module to its open-source implementation or identify any remaining commercial-tool fallbacks; this directly affects whether the reported PPA deltas can be attributed to the open-source methods alone.

    Authors: We agree that the current §3 description lacks an explicit mapping. The revised manuscript will include a new table (or expanded subsection) that maps each module (3D partitioning, placement, 3D routing, RC extraction, thermal simulation) to its concrete open-source implementation within OpenROAD-flow-scripts, along with any identified commercial-tool fallbacks or dependencies. This will allow readers to directly assess attribution of the reported PPA deltas. revision: yes

  2. Referee: [§5] §5 (Experimental Results): the headline improvements (area 51.19%, wirelength 24.06%, timing 30.84%, power 5.72%) are reported without stating the number of test cases, statistical significance tests, run-to-run variance, or data-selection criteria, leaving the robustness of the cross-flow comparison unclear.

    Authors: We acknowledge the need for greater experimental detail. The revised §5 will explicitly state the number of test cases, the data-selection criteria used, any statistical significance tests applied, and run-to-run variance (where relevant) to substantiate the cross-flow PPA comparisons and improve reproducibility. revision: yes

Circularity Check

0 steps flagged

Empirical benchmark with no self-referential derivations or fitted predictions

full rationale

The paper introduces Open3DBench as an open-source framework extending OpenROAD-flow-scripts, presents two placement algorithms (Open3D-Tiling and Open3D-DMP), and reports direct empirical PPA deltas versus 2D baselines. No equations, uniqueness theorems, ansatzes, or predictions appear that reduce by construction to fitted inputs or prior self-citations. The central claims rest on experimental measurements of area, wirelength, timing, and power, which are externally falsifiable and do not rely on any load-bearing self-referential step.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

No free parameters, axioms beyond standard EDA tool assumptions, or invented entities are introduced; the work rests on existing OpenROAD infrastructure.

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Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score.

  1. A PPA-Driven 3D-IC Partitioning Selection Framework with Surrogate Models

    cs.LG 2026-04 unverdicted novelty 5.0

    DOPP applies surrogate models to select 3D-IC partitioning candidates that optimize true PPA, matching exhaustive-search quality with substantially lower evaluation cost across eight designs.

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