Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Design and Implementation of an FPGA-Based Hardware Accelerator for Transformer
As of 9 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2503.16731.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-09T06:31:02.800959+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-06-27T22:32:56.444150Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-07-02T16:37:09.291720Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 4ffb176f-555e-4058-be5f-921d2aa95450 · inbound
Chimera: Neuro-Symbolic Attention Primitives for Trustworthy Dataplane Intelligence cites this paper.
Chimera: Neuro-Symbolic Attention Primitives for Trustworthy Dataplane Intelligence Design and Implementation of an FPGA-Based Hardware Accelerator for Transformer
Reference 14
- Resolution
- verified exact
- arxiv_id, observed 2026-05-15T22:20:22.523277Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.
Observation 1b2f47cc-08a3-4c42-acf9-80b3ac870984 · inbound
Attention at the Theoretical Minimum: A Mathematics of Arrays Framework for Memory-Optimal Transformer Kernels cites this paper.
Attention at the Theoretical Minimum: A Mathematics of Arrays Framework for Memory-Optimal Transformer Kernels Design and Implementation of an FPGA-Based Hardware Accelerator for Transformer
Reference 12
- Resolution
- verified exact
- arxiv_id, observed 2026-07-02T16:37:09.293187Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.