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REVIEW 5 major objections 6 minor 30 references

High Throughput Event Filtering: The Interpolation-based DIF Algorithm Hardware Architecture

T0 review · 5 major / 6 minor · reviewed 2026-08-07 · deepseek-v4-flash

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Pith's one-line read The paper's central claim is that a hardware-tailored event filter can run at 403 million events per second on an FPGA while matching state-of-the-art denoising accuracy.

desk verdict Solid FPGA implementation paper with a genuine throughput contribution, but the 'comparable to SOTA' claim rests on a circular NNb-derived ground truth and should be read with that caveat. read the letter →

arxiv 2506.05825 v1 pith:SUPOFM5U submitted 2025-06-06 cs.CV

Marcin Kowalczyk , Tomasz Kryjak This is my paper
classification cs.CV
keywords eventcamerasdynamicvisionsensorsdenoisingFPGAhigh-throughputfilteringDIFalgorithmdatasetbackgroundactivitynoise
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

Event cameras produce sparse, asynchronous streams that contain noise, and filtering that noise fast enough for modern high-resolution sensors has been a bottleneck. This paper proposes the Distance-based Interpolation with Frequency Weights (DIF) filter, designed together with its FPGA implementation so that it can process 403.39 million events per second at 1280x720 resolution and 428.45 MEPS at 640x480. Across the paper's datasets, the average AUROC values range from 0.844 to 0.999, which the authors argue is comparable to state-of-the-art filtering methods, with much smaller accuracy loss as noise intensity rises. The authors also release a new 1280x720 event dataset with synthetic and recorded noise. The practical upshot is that high-resolution event streams could be denoised in real time on reconfigurable hardware without requiring large per-pixel memories.

What carries the argument

The central object is the DIF interpolation rule: for each event, four neighbouring 16x16 subareas contribute timestamp differences weighted by $C_i = 1/(I_i d_i)$, where $I_i$ is the estimated interval between events in that subarea (i.e., inverse event frequency) and $d_i$ is the L2 distance from the event to the subarea centre; the event is kept if the weighted timestamp difference is below the filter length. To make this FPGA-friendly, the paper multiplies the comparison through by the sum of the weights to remove divisions, stores distances in a ROM, truncates and saturates intermediate coefficients, and pipelines DSP multipliers so that a new event can be accepted every clock cycle. The subarea feature memory, with only timestamps and intervals per 16x16 block rather than per pixel, is what keeps memory usage small enough for on-chip BlockRAM.

What would settle it

Re-run the recorded-camera evaluation with a ground truth built independently of the nearest-neighbour filter, for example manual event-level annotation or a simulated clean version of the same scenes, and compare the reported AUROC and AUPRC values; if DIF no longer matches or beats NNb and STCF, the claim of comparable accuracy on real data is weakened.

Watch

Extended reading notes

Core claim

The paper claims to present the first event-processing hardware architecture that combines filtering quality comparable to state-of-the-art methods with throughput above 400 million events per second at 1280x720 resolution. The DIF filter divides the sensor into 16x16 subareas, each holding a running timestamp and an estimated event interval updated by first-order IIR recursions; each event is classified by interpolating the features of its four neighbouring subareas, weighting timestamps by event frequency and inverse distance, and comparing the result with a filter-length threshold. The authors transform the comparison algebraically to eliminate divisions, replace exact L2 distances with a read-only lookup table rounded to 0.25 precision, and reduce coefficient bit widths with saturation, so the FPGA processes one event per clock cycle. The hardware implementation reproduces the software DIF's AUROC on average (0.907 for generated noise and 0.909 for recorded noise) while running at 312.70 MHz at 1280x720 and 400.32 MHz at 640x480; without the global update of inactive areas, throughput reaches 403.39 MEPS and 428.45 MEPS respectively. The paper also reports that DIF's AUROC drops only about 1% when noise intensity rises from 0.01 Hz/px to 5 Hz/px, whereas NNb, EDnCNN, and AEDNet drop by roughly 9%, 14%, and 4-6% on the same tested sequences.

Load-bearing premise

The real-camera recordings are labelled as clean by running the nearest-neighbour filter with filter lengths chosen subjectively, so if that labelling is biased, the accuracy comparisons on real data are not fully fair.

Editorial extensions

If this is right

  • Event filtering no longer needs to be the throughput bottleneck for 720p event streams: the no-update version sustains 403.39 MEPS at 1280x720, and the version with global updates still sustains 312.52 MEPS.
  • Because the hardware DIF matches the software DIF's AUROC on average, the fixed-point and ROM approximations do not measurably degrade filtering quality on the tested datasets.
  • DIF remains stable across a wide noise range, with AUROC decreasing only about 1% from 0.01 Hz/px to 5 Hz/px, in contrast to NNb, EDnCNN, and AEDNet, so the architecture suits sensors whose noise varies with illumination or temperature.
  • Memory scales with the number of subareas rather than pixels, so even a scale-8 variant using eight times less memory than NNb or STCF fits within the FPGA at 1280x720.
  • The released 1280x720 dataset with synthetic and recorded noise provides a common testbed for comparing filtering accuracy and throughput at a resolution where most prior FPGA filters were not evaluated.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Beyond the paper: since the global update of inactive areas has a negligible measured effect except at very low noise intensities, real-time streaming systems can safely use the higher-throughput no-update version, and moving the activity table from registers to BlockRAM could restore the update without its clock-frequency penalty.
  • Beyond the paper: the same block-feature interpolation pattern is a general template for other sparse asynchronous sensor streams where per-pixel state is too costly; a testable extension is applying DIF-style IIR block features to LiDAR or spike-train denoising.
  • Beyond the paper: the new dataset enables a fair throughput-versus-quality comparison at 720p, and a useful next benchmark would add spatially correlated or non-Poisson noise, which the current noise generator does not model.
  • Beyond the paper: the real-camera accuracy comparisons should be re-run with ground truth built independently of the nearest-neighbour filter, because the paper's recorded-camera ground truth is NNb-filtered with subjectively chosen lengths.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

5 major / 6 minor

Summary. The paper proposes the Distance-based Interpolation with Frequency Weights (DIF) event-filtering algorithm and its FPGA hardware architecture. The architecture is implemented on a Zynq UltraScale+ device and evaluated with Vivado synthesis, on-board tests with preloaded event buffers, and comparisons against NNb, STCF, EDnCNN, and AEDNet. The reported peak throughputs are 403.39 MEPS at 1280x720 and 428.45 MEPS at 640x480 for the variant without global update, and 312.52 MEPS / 400.26 MEPS with global update. Average AUROC values range from 0.844 to 0.999 across the prepared datasets, and the paper claims filtering efficiency comparable to state-of-the-art methods. The authors also introduce a new 1280x720 event dataset combining V2E-generated synthetic data, real EVK1-HD recordings, and artificial/recorded noise.

Significance. If the claims hold, this is a valuable hardware contribution: the paper provides a detailed, hardware-aware transformation of the DIF algorithm, reports low resource utilization, gives synthesis timing and power estimates, and validates the implementation on an FPGA against a software model. The fixed-point modifications, elimination of divisions, and careful pipelining are technically solid, and the dataset, once released, could be a useful high-resolution benchmark for event denoising. However, the headline claims of 'more than 400 MEPS' and 'efficiency comparable to SOTA' rest on qualifications that are not fully reflected in the abstract: the throughput figure is a peak synthesis estimate for the no-global-update variant, and the real-data AUROC comparisons are measured against a reference that is itself NNb-filtered. These issues do not invalidate the hardware work, but they require explicit qualification and a sensitivity analysis.

major comments (5)
  1. [Section 5, Tables 9-10] The real-camera 'clean' references (Corn, Street, Dancing, People) are produced by applying the NNb filter with subjectively chosen filter lengths, as stated in Section 5. The AUROC comparisons against NNb and STCF on these datasets therefore measure agreement with an NNb-derived reference rather than accuracy against an independent ground truth. On the independent V2E ground truth (rows 101, Library, Model, RIS in Table 9), the hardware configuration DIF(16,0.25) is on average 0.0145 below NNb and 0.0308 below STCF, so the 'comparable to SOTA' conclusion is mainly supported by the real-data rows whose reference is itself a baseline. Please report the synthetic-only averages separately, quantify how the real-data reference choice affects the ranking, and ideally construct a real-data reference by a method other than NNb (or a consensus of several filters) to establish the direction of the bias.
  2. [Section 7.3 and Abstract] The 403.39 MEPS and 428.45 MEPS figures are for the variant without the global update of inactive areas; the architecture with global update achieves 312.52 MEPS and 400.26 MEPS, respectively. The abstract and introduction quote the higher numbers without this qualification, so the claim of 'throughput of more than 400 million events per second for a resolution of 1280x720' is true only for a reduced variant. In addition, the throughput is estimated from Vivado timing assuming one event per clock cycle and validated on an FPGA with only 29,031 preloaded events, not measured with a live event camera. Please state the throughput definition explicitly (peak filter-core throughput, no-global-update variant) and provide the best available sustained-throughput estimate for the complete system.
  3. [Section 8, Tables 12-13, Summary] The summary states that DIF 'outperformed very recent methods based on deep neural networks,' but the reported AUROC against AEDNet is essentially tied (Library: DIF 0.861 vs AEDNet 0.848; Street: DIF 0.837 vs AEDNet 0.838), and on DVSCLEAN AEDNet is about 0.02 higher (Table 10). The statement is only clearly true for EDnCNN. Please revise the summary and conclusion to distinguish the two DNN baselines.
  4. [Section 5 and Contributions] The dataset and code are described as 'publicly available' and 'releasing to the community,' but the footnotes state that the material will be published only once the paper is accepted, and the repository link is provided as a placeholder. The RIS sequence is also excluded for privacy. Please make the actual repository and dataset available at the time of submission (or explain the embargo policy) and specify exactly which sequences are released; otherwise this contribution cannot be verified.
  5. [Section 6, Table 3 and Section 8] The DIF parameters (scale and update factor) and the STCF parameter N are selected on the same datasets used for the final comparison, and the NNb filter length used in the evaluation is not reported. This introduces a risk of overfitting that is not discussed. Please describe a validation split or otherwise justify that the chosen parameters are not tuned on the test data, and report the exact NNb/STCF configurations used in the comparison.
minor comments (6)
  1. [Abstract and Introduction] The phrase 'achieved a throughput' should be qualified as 'peak filter-core throughput for the variant without global update' to match Section 7.3.
  2. [Section 5] The footnotes 'The material will be published once the paper has been accepted' appear three times; these should be resolved before publication.
  3. [Section 7.3] In the sentence 'the algorithm implemented by the hardware architecture achieved an average AUROC value of 0.908 across the datasets used, the same as the baseline method,' it is unclear which baseline is meant; the software DIF(16,0.25) average in Table 9 is 0.908, while NNb and STCF are 0.913 and 0.914.
  4. [Section 8] The text '0.01 Hz/px do 5 Hz/px' should read 'to 5 Hz/px', and 'at an noise intensity' should be 'at a noise intensity'.
  5. [Section 8, Tables 12-14] The captions and text should specify that the DIF 'Model' column refers to the hardware model with fixed-point modifications, and the conclusions should consistently refer to the implemented DIF(16,0.25) rather than the software DIF(8,0.5) when discussing the hardware architecture.
  6. [Section 3] A direct comparison with the prior IIR-filter architecture [17] (385.8 MEPS) would help calibrate the novelty of the >400 MEPS claim, including differences in supported resolution and resource usage.

Circularity Check

2 steps flagged · score 4.0 of 10

Real-camera ground truth is generated by the NNb filter (Section 5), making AUROC comparisons against NNb/STCF on four real datasets partly self-referential; DIF hyperparameters are also selected on the same test datasets (Table 3).

  1. self definitional [Section 5 (Datasets), real-camera sequence preparation; used as ground truth in Sections 6 and 8, Tables 1, 2, and 9.]
    "we prepared several sequences using Prophesee’s EVK1-HD event camera and applied the nearest-neighbour (NNb) algorithm to remove noise. The length of the filter was selected for each recording separately on the basis of a subjective evaluation of the quality of the result."

    The 'clean' versions of the four real-camera recordings (Corn, Street, Dancing, People) are produced by NNb filtering the raw recordings. These NNb-filtered streams are then used as the reference labels when recorded noise is added and AUROC is computed in Tables 1, 2, and Figure 15. Thus, for these four datasets, NNb and its generalization STCF are scored against a reference that is literally NNb's own output. Agreement with this reference measures alignment with NNb's filtering criterion rather than an independent ground truth. The paper's 'comparable to SOTA' claim therefore rests in part on a self-defined reference: on the four independent V2E-simulated datasets, DIF(16,0.25) is on average 0.0145 below NNb and 0.0308 below STCF.

  2. fitted input called prediction [Section 6 (Evaluation), Table 3; reported in Section 8, Tables 9 and 10.]
    "Table 3 shows the average AUROC for different parameters of the DIF algorithm and noise levels (both artificial and recorded). Based on the data presented, the algorithm is most effective when dividing the sensor matrix into subareas with a size of 8×8 and an update factor of 0.5. However, this size of subareas requires four times more data to be stored in memory than a size of 16×16. For a size of 16×16, the best result is achieved with an update factor of 0.25."

    The scale (8, 16, 32) and update factor (0.125, 0.25, 0.5) are selected by inspecting average AUROC computed on the same datasets that later constitute the reported evaluation set (Tables 1, 2, 9). The reported DIF AUROC values—including the 0.908 average attributed to the hardware implementation—are therefore the in-sample values at the chosen hyperparameters, not independent out-of-sample predictions. The paper does not hide this, but the headline 'comparable to SOTA' is partly a re-statement of the parameter-search objective.

full rationale

Step 1 is the substantive circularity. The paper creates ground truth for four real-camera sequences by NNb filtering, then uses those NNb-filtered streams as the reference when scoring NNb, STCF, and DIF. The four real-data rows in Table 9 thus measure agreement with NNb's own filtering decisions. On the four independent V2E-simulated sequences, which have simulator-generated ground truth, DIF(16,0.25) is 0.0145 below NNb and 0.0308 below STCF, so the 'comparable to SOTA' conclusion relies substantially on the self-defined real-data reference. Step 2 is a separate but related methodological circularity: the scale/update-factor grid is evaluated on the same datasets used for final reporting, so the reported AUROC values are in-sample fits. The throughput claim (403.39 MEPS measured on the Zynq UltraScale+), the V2E synthetic evaluation, and the DVSCLEAN comparison with third-party models and data are independent and are not circular. Overall the central hardware-architecture claim is independent, but the efficiency-comparability claim is partially circular; hence a score of 4.

Assumptions & free parameters 7 free parameters · 5 assumptions · 0 invented entities

The central claims rest on a set of chosen parameters (scale, update factor, filter length, precision settings) and on domain assumptions about noise models and simulator realism. No new physical entities are introduced. The most consequential free parameter is the NNb filter length used to create ground-truth labels for real recordings, which biases the evaluation.

free parameters (7)
  • subarea scale = 16 (hardware), 8 or 16 in comparisons
    Size of square areas into which the sensor matrix is divided; chosen based on AUROC results in Table 3.
  • update factor u = 0.25 (hardware), 0.5 (best in comparisons)
    IIR update factor for timestamps and intervals; tuned on the test datasets.
  • filter length FL = 200 (hardware)
    Threshold in comparison (14); set to 200 for the hardware implementation.
  • global update interval = 20 ms (default), 2 ms tested
    Interval for updating inactive subareas; affects throughput and AUROC.
  • precision truncation bits = 8 bits discarded
    Fixed-point optimization for K coefficients; chosen after testing 7-10 bits.
  • saturation bit width = 12 bits
    Saturation value 4095; tested 11, 12, 13 bits.
  • NNb filter length for real-data ground truth = 200, 200, 1000, 500 us per sequence
    Manually selected to produce 'clean' real recordings; subjective.
assumptions (5)
  • domain assumption Noise in event data is uncorrelated background activity with spatiotemporal locality, so filtering can be based on neighborhood activity.
    Section 2 and 4; basis of all background activity filters.
  • domain assumption V2E simulator produces realistic event data from video frames.
    Section 5; synthetic datasets generated with V2E, assumed to reflect real sensor behavior.
  • domain assumption Poisson process model for noise generation (approximated by Bernoulli trials) matches real sensor noise.
    Section 5; noise generator based on [18].
  • domain assumption Vivado timing analysis and power estimates are accurate for the FPGA implementation.
    Section 7.3; throughput and power derived from synthesis, not measured on hardware with a live sensor.
  • domain assumption AUROC is a valid summary metric for filtering quality independent of threshold.
    Section 6; from [18].

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Cite this review

Pith. "Pith review of High Throughput Event Filtering: The Interpolation-based DIF Algorithm Hardware Architecture." pith.science (2026). https://pith.science/paper/SUPOFM5U

@misc{pith2026250605825,
  author       = {Pith},
  title        = {Pith review of: High Throughput Event Filtering: The Interpolation-based DIF Algorithm Hardware Architecture},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/SUPOFM5U}},
  note         = {Machine review of arXiv:2506.05825}
}
read the original abstract

In recent years, there has been rapid development in the field of event vision. It manifests itself both on the technical side, as better and better event sensors are available, and on the algorithmic side, as more and more applications of this technology are proposed and scientific papers are published. However, the data stream from these sensors typically contains a significant amount of noise, which varies depending on factors such as the degree of illumination in the observed scene or the temperature of the sensor. We propose a hardware architecture of the Distance-based Interpolation with Frequency Weights (DIF) filter and implement it on an FPGA chip. To evaluate the algorithm and compare it with other solutions, we have prepared a new high-resolution event dataset, which we are also releasing to the community. Our architecture achieved a throughput of 403.39 million events per second (MEPS) for a sensor resolution of 1280 x 720 and 428.45 MEPS for a resolution of 640 x 480. The average values of the Area Under the Receiver Operating Characteristic (AUROC) index ranged from 0.844 to 0.999, depending on the dataset, which is comparable to the state-of-the-art filtering solutions, but with much higher throughput and better operation over a wide range of noise levels.

Figures

Figures reproduced from arXiv: 2506.05825 by the authors.

Figure 1
Figure 1. A diagram of the proposed event filtering system. Marked [PITH_FULL_IMAGE:figures/full_fig_p001_1.png] view at source ↗
Figure 2
Figure 2. The example update of subarea parameters for two events, [PITH_FULL_IMAGE:figures/full_fig_p005_2.png] view at source ↗
Figure 3
Figure 3. In 3a, the matrix division is shown as a function of the num [PITH_FULL_IMAGE:figures/full_fig_p006_3.png] view at source ↗
Figures from the paper (17 more)
Figure 4
Figure 4. Figure 4 [PITH_FULL_IMAGE:figures/full_fig_p007_4.png]
Figure 4
Figure 4. Figure 4: Example frames from input recordings to the [PITH_FULL_IMAGE:figures/full_fig_p008_4.png]
Figure 6
Figure 6. Figure 6: Event frames created from recorded data with an accumula [PITH_FULL_IMAGE:figures/full_fig_p009_6.png]
Figure 7
Figure 7. Figure 7: An example ROC plot that compares the performance of DIF [PITH_FULL_IMAGE:figures/full_fig_p010_7.png]
Figure 8
Figure 8. Figure 8: The plot displays the AUROC coefficient for various noise intensities in the Street dataset [PITH_FULL_IMAGE:figures/full_fig_p010_8.png]
Figure 9
Figure 9. Figure 9: A simplified diagram of the architecture designed to realise [PITH_FULL_IMAGE:figures/full_fig_p012_9.png]
Figure 11
Figure 11. Figure 11: Architecture for calculation of the filtered timestamp. [PITH_FULL_IMAGE:figures/full_fig_p013_11.png]
Figure 12
Figure 12. Figure 12: Architecture for calculation of the filtered interval. [PITH_FULL_IMAGE:figures/full_fig_p013_12.png]
Figure 13
Figure 13. Figure 13: Architecture for calculation of the distance to the subareas [PITH_FULL_IMAGE:figures/full_fig_p013_13.png]
Figure 16
Figure 16. Figure 16: Comparison of the average AUROC value over all test se [PITH_FULL_IMAGE:figures/full_fig_p016_16.png]
Figure 14
Figure 14. Figure 14: Filtering efficiency plotted against noise intensity for the test sequences. AUROC for Noise intensities Noise intensity [Hz/px] AUROC 0 0.5 1 1.5 0.94 0.96 0.98 1 Corn 0 0.5 1 1.5 0.8 0.85 0.9 Street 0 0.5 1 1.5 0.94 0.95 0.96 0.97 Dancing 0 0.5 1 1.5 0.86 0.88 0.9 0…
Figure 15
Figure 15. Figure 15: Plots showing the effectiveness of filtering against recorded noise intensity for the test sequences. 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Noise intensity [Hz/px] 0.87 0.88 0.89 0.9 0.91 0.92 0.93 AUROC AUROC for Noise intensities DIF(8, 0.5) DIF(16, 0.25) NNb STCF(2) [PI…
Figure 19
Figure 19. Figure 19: Comparison of the average AUPRC value over all test se [PITH_FULL_IMAGE:figures/full_fig_p017_19.png]
Figure 18
Figure 18. Figure 18: Comparison of the average AUPRC value over all test se [PITH_FULL_IMAGE:figures/full_fig_p017_18.png]
Figure 21
Figure 21. Figure 21: AUROC comparison of filtering algorithms for various lev [PITH_FULL_IMAGE:figures/full_fig_p018_21.png]
Figure 22
Figure 22. Figure 22: AUPRC comparison of filtering algorithms for various lev [PITH_FULL_IMAGE:figures/full_fig_p019_22.png]
Figure 23
Figure 23. Figure 23: AUPRC comparison of filtering algorithms for various lev [PITH_FULL_IMAGE:figures/full_fig_p019_23.png]

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Pith tools

Reviewed August 7, 2026 · model on record in the stance chip above.