Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-07T05:25:38.266449Z
Paper Citation Record · LEDGER
Towards a Base-Station-on-Chip: RISC-V Hardware Acceleration for wireless communication
As of 8 August 2026, this Paper Citation Record lists 4 of 4 outbound references and 0 inbound Pith citation observations for arXiv:2506.07873.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-08T06:32:00.761636+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links
A source-named dated measurement, never combined with another source.
Source: cited_works
Reference resolution
4 of 4 outbound references displayed
- verified exact2
- verified fuzzy0
- unresolved1
- parse uncertain0
- malformed identifier1
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
Observation 28db9943-4a02-4da0-9fe2-94241955e993 · outbound
This paper cites Efficient Parallelization of 5G- PUSCH on a Scalable RISC-V Many-Core Processor.
Towards a Base-Station-on-Chip: RISC-V Hardware Acceleration for wireless communication Efficient Parallelization of 5G- PUSCH on a Scalable RISC-V Many-Core Processor
Reference 1
- Resolution
- malformed identifier
- no resolver link, observed 2026-08-07T05:25:38.255154Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation b239d670-5e3c-4eea-99fe-964537977c4d · outbound
This paper cites 5G Channel Estimation Kernels on RISC-V Vector Digital Signal Processors.
Towards a Base-Station-on-Chip: RISC-V Hardware Acceleration for wireless communication 5G Channel Estimation Kernels on RISC-V Vector Digital Signal Processors
Reference 2
- Resolution
- unresolved
- no resolver link, observed 2026-08-07T05:25:38.259085Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation cbe35f41-6045-4459-99a2-1c91a91af63e · outbound
This paper cites A 1024 RV-Cores Shared-L1 Cluster with High Bandwidth Memory Link for Low-Latency 6G-SDR.
Towards a Base-Station-on-Chip: RISC-V Hardware Acceleration for wireless communication A 1024 RV-Cores Shared-L1 Cluster with High Bandwidth Memory Link for Low-Latency 6G-SDR
Reference 3
- Resolution
- verified exact
- local_arxiv, observed 2026-08-07T05:25:38.311736Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.
Observation 9c14ce81-5da0-4000-85ce-1a9bda13674d · outbound
This paper cites Hardware Acceleration for RLNC: A Case Study Based on the Xtensa Processor with the Tensilica Instruction-Set Extension.
Towards a Base-Station-on-Chip: RISC-V Hardware Acceleration for wireless communication Hardware Acceleration for RLNC: A Case Study Based on the Xtensa Processor with the Tensilica Instruction-Set Extension
Reference 4
- Resolution
- verified exact
- doi, observed 2026-08-07T05:25:38.296875Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.
Pith citing papers
No inbound Pith citation observations are available.