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REVIEW 4 major objections 6 minor 1 cited by

TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs

T0 review · 4 major / 6 minor · reviewed 2026-08-06 · deepseek-v4-flash

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Pith's one-line read This paper claims that a two-layer graph convolutional network operating on data-flow graphs extracted from RTL Verilog designs detects hardware trojans at 98.66% precision and 92.30% recall, and that 4-bit quantization keeps accuracy…

desk verdict A GNN-for-RTL-trojan detection paper with a plausible setup but an evaluation whose headline numbers are not reliable; the dataset and architecture sweep are the real contribution, not the accuracy claim. read the letter →

arxiv 2506.17894 v1 pith:TEKIJC7C submitted 2025-06-22 cs.LG cs.CR

Kiran Thorat , Amit Hasan , Caiwen Ding , Zhijie Shi This is my paper
classification cs.LGcs.CR
keywords hardwaretrojandetectiongraphneuralnetworksregister-transferleveldata-flowRTLnetlistmodelquantizationclassificationRISC-V
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper sets out to show that graph neural networks can find hardware trojans at the register-transfer level, early in chip design, by treating an RTL netlist as a graph and classifying the whole design as trojan or trojan-free. To do this, the authors assemble a custom dataset of 51 RTL designs, 40 with one of four trojan types inserted and 11 clean, and compare GCN, GAT, and GIN architectures at two, three, and five layers. Their central result is that a two-layer GCN beats the other configurations, reaching 98.66% precision, 92.4% accuracy, 92.30% recall, and a 94.6% F1 score. They also report that 4-bit weight quantization keeps detection accuracy close to the unquantized model while cutting the memory footprint by a factor of eight. The practical stake is that trojans inserted by untrusted third-party intellectual property or tooling could be caught before fabrication, when fixes are still cheap.

What carries the argument

The load-bearing object is the directed data-flow graph $G=(V,E)$ built from the RTL netlist by flattening the design, parsing it, and merging per-signal data-flow trees; nodes are signals, constants, or operations, and an edge $e_{ij}$ means the value of node $v_i$ depends on $v_j$. The GNN then alternates aggregation and update steps, with the graph convolutional layer using a normalized adjacency matrix to transform node representations, followed by graph-level pooling and a fully connected predictor. The efficiency claim rides on 4-bit post-training quantization, which maps each 32-bit weight to one of $2^4=16$ levels through a scaling factor, cutting storage by 8x; the paper applies this with a quantization library and reports the resulting accuracy-memory tradeoff.

What would settle it

Run the trained 2-layer GCN on held-out public chip-level trojan benchmarks not in the 51-design set, ideally a clean design and a trojan-injected version of the same design, and compare per-design predictions; if recall falls well below 92.30% on trojans with different trigger/payload structures, the central claim is not general. Equally, replacing the undisclosed node features with trivial constant features while keeping the graph structure would show whether the accuracy comes from the graph or the features.

Watch

Extended reading notes

Core claim

On its own terms, the paper's discovery is that graph-level classification of data-flow graphs derived from RTL Verilog can separate trojan-injected designs from clean ones, and that a shallow 2-layer GCN does this better than deeper or attention-based variants. The reported numbers for the 2-layer GCN are precision 98.66%, accuracy 92.4%, recall 92.30%, and F1 94.6%, with performance dropping as layers increase to three or five. Quantizing the 2-layer GCN to 4-bit weights lowers precision to 92.2% and accuracy to 88.3% while recall rises to 95.0%, and cuts storage by a factor of eight, which the paper presents as a favorable memory-accuracy tradeoff for deployment. Against the two prior GNN detectors it compares with on the shared AES, RS232, and PIC designs, the framework reports better or comparable precision, recall, and F1 in most settings.

Load-bearing premise

The whole evaluation rests on the assumption that 51 designs, 40 with the authors' own injected trojans and 11 clean, are a large and representative enough sample that a graph-level GNN trained on them will recognize trojans in other large designs; if that sample is not representative, the reported precision and recall will not transfer.

Editorial extensions

If this is right

  • Shallow GNNs, specifically a two-layer GCN, are the right operating point for graph-level trojan detection; deeper GCN, GAT, and GIN models all lose precision, accuracy, and recall.
  • A 5-layer GIN is a viable alternative, reaching 98.2% precision and 91.9% F1, so non-convolutional architectures deserve attention in this task.
  • 4-bit quantization can shrink a deployed trojan detector by 8x with a small accuracy loss, making GNN-based detection feasible on resource-limited hardware.
  • The framework scales to large designs such as RISC-V cores, for which it reports graph sizes of thousands of nodes and edges with tractable extraction times.
  • On the shared AES, RS232, and PIC subsets, the proposed detector beats or matches the two prior GNN-based detectors on most reported metrics.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Beyond the paper: because the dataset contains different designs in the clean and trojan classes, the reported accuracy may partly reflect design identity rather than the trojan's structural signature; a same-design clean-versus-trojan pair test would settle this.
  • Beyond the paper: the node features are never listed, so the result is not independently reproducible until they are specified and ablated.
  • Beyond the paper: the same graph pipeline could be pointed at gate-level netlists or at trojans inserted by CAD optimizations, which would test whether the representation generalizes beyond RTL-scale hand-injected trojans.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

4 major / 6 minor

Summary. The paper proposes TROJAN-GUARD, a graph-level hardware trojan detection framework for RTL designs. RTL Verilog designs are flattened and parsed with Pyverilog to produce data-flow graphs; graph classification is then performed with GCN, GAT, and GIN models of depth 2, 3, and 5, and the best model is quantized to 4-bit weights for reduced memory and faster inference. A custom dataset of 51 designs (40 with inserted trojans, 11 benign) is introduced, covering AES, RISC-V/DarkRISCV, PIC, and other designs and four trojan payload types. The authors report 98.66% precision and 92.30% recall for a 2-layer GCN, an 8x memory reduction from quantization, and favorable comparisons with two prior GNN-based detectors on AES/RS232/PIC subsets.

Significance. If the evaluation were sound, the paper would provide a useful datapoint: a broader design set than many earlier TrustHub-only studies, a systematic comparison of GNN layer types and depths, and a deployment-relevant quantization study. The authors also acknowledge overfitting risks in the SOTA comparison (Section IV-E). However, the central empirical claims rest on a private 51-graph dataset with no code or data release, no error bars, and an unclear relation between the fixed split and the cross-validation procedure. The headline accuracy numbers are therefore not yet established. The contribution is more a promising framework and dataset description than a validated detector.

major comments (4)
  1. [IV-C, Figure 6] The paper does not explain how the 70/10/20 split in Section IV-B relates to the 5-fold cross-validation claimed in Section IV-C, and it never states that model selection was performed on the validation split alone. If GCN-2 was chosen as 'the best model' on the basis of Figure 6 and the same evaluation set then produced the headline 98.66% precision and 92.30% recall, the comparison across nine configurations can bias the reported numbers upward. The test portion has only 11 designs (9 trojan, 2 benign), so one misclassification changes recall by roughly 11 points and precision by roughly 10 points; with no per-fold results, standard deviations, or confidence intervals, the abstract metrics are not statistically supported. Please specify which split produced Figure 6, separate model selection from test evaluation, and report error bars.
  2. [III-B] The node features are never enumerated. The text defines G=(V,E), lists vertex types (signal, constant, operation), and says a 'final DFG based graph is created with node features,' but the composition of the feature vector and whether edge features exist are not stated anywhere. The learned classifier and all accuracy claims depend on this representation, so the method is not reproducible and comparison with prior work is incomplete. Please provide the exact feature dimensions and encodings, and state whether edge attributes or graph-level features are used.
  3. [IV-F, Eq. (6)] The claim that quantization keeps accuracy 'nearly the same' is not supported for the recommended model. For GCN-2, precision falls from 98.66% to 92.2% and accuracy from 92.4% to 88.3%; the paper characterizes these as 'slight reductions' without significance or error bars. Only two of the nine configurations are quantized, and the scaling factor S in Eq. (6) is not specified. Please quantify the trade-off across all configurations (or justify the subset), define S, and state whether activations are also quantized.
  4. [IV-E] The SOTA comparison is not a controlled experiment. The text says 'we did not employ the validation dataset split and k-fold validation technique for fair comparison' and admits 'this might lead to overfitted models'; several RS232 and PIC cells are 100% for multiple methods, which is consistent with very small test sets. The PIC sentence in the same section also acknowledges overfitting. Please report the number of designs per class used in each comparison, use a common train/test protocol for all methods, and state how 'fair' is defined when the protocol is uncontrolled.
minor comments (6)
  1. [Figure 6] The caption lists panels as (a) Accuracy, (b) Precision, (c) F1, (d) Recall, but Section IV-C refers to (a) as precision and (b) as accuracy; the labels should be aligned.
  2. [References] Reference [7] is cited for the bitsandbytes library, but the bibliographic entry [7] is the SPQR paper; the correct software citation and version are needed.
  3. [II] Section II claims that the framework induces sparsity, but no sparsity experiments or algorithmic description appear in Sections III or IV; either add them or remove the claim.
  4. [Table I] Table I reports an embedding dimension of 2 and a pooling ratio of 0.8 without any explanation of the readout or pooling layer; please clarify the architecture.
  5. [IV-B] The paper contains no data or code availability statement; for a custom dataset that is central to the claims, a datasheet with per-design provenance, trojan types, and generation scripts should be provided.
  6. [Throughout] Typos include 'Graph Isomporhism Network' (Section III-C3), 'full addder' (Fig. 1), and 'the PIC dataset is too small models give the overfitted for multiple ran result' (Section IV-E).

Circularity Check

0 steps flagged · score 0.0 of 10

No circular derivation: the accuracy claim is an empirical measurement, not a tautology.

full rationale

The paper's load-bearing claim is an empirical classification result: a GNN trained on DFG graphs extracted from RTL designs achieves reported precision and recall. The derivation chain is RTL designs -> Pyverilog data-flow graphs -> GNN training -> evaluation metrics. No equation defines the reported precision or recall in terms of the input labels in a way that forces the outcome. Trojan labels are generated by explicit code-level injection (Figs. 2 and 3), not by the model's own predictions. The quantization section compares a quantized model against its full-precision counterpart and reports independent measurements of memory and accuracy; that is a straightforward experimental comparison. The SOTA comparison reuses hyperparameters and a dataset subset, but this is an evaluation protocol choice rather than a circular reduction. The only notable concern is that GCN-2 is selected as the best model from the same Figure 6 that supplies the headline metrics, and no error bars are reported; this is a selection-bias or soundness risk, not a circularity. There are no load-bearing self-citations, no uniqueness theorems imported from the authors' prior work, and no renamed empirical pattern presented as a derivation. Consequently, the paper's central claim does not reduce to its own inputs, and no circular step can be exhibited with a specific quote and reduction.

Assumptions & free parameters 8 free parameters · 4 assumptions · 0 invented entities

The central claims rest on a small, unreleased dataset and on graph and feature choices that are not fully described. The only free parameters are standard GNN training hyperparameters plus the post-hoc choice of the 2-layer GCN; no new physical or mathematical constants are introduced, and no invented entities appear.

free parameters (8)
  • learning_rate = 0.001
    Set by hand in Table I; not derived.
  • hidden_units = 200
    Model width chosen manually.
  • dropout_rate = 0.5
    Regularization hyperparameter chosen without justification.
  • batch_size = 4
    Very small graph-level batch size; not explained.
  • pooling_ratio = 0.8
    Graph pooling ratio selected by hand.
  • embedding_dimension = 2
    Output embedding dimension set to 2, which is unusually low and may limit representational capacity.
  • selected_layers = 2
    The 2-layer GCN was chosen post hoc because it performed best on the evaluation data (Section IV-C).
  • quantization_scale_factor = per-tensor
    Eq. (6) computes S from the weight distribution, a standard quantization choice.
assumptions (4)
  • domain assumption RTL netlists can be represented as directed dataflow graphs with nodes as signals, constants, and operations, preserving trojan-relevant structure.
    Section III-B defines the graph; if the extraction discards trojan-specific wiring, detection would fail.
  • domain assumption GNN message passing over these DFGs generalizes from 51 labeled graphs to new designs.
    Section IV-C trains on 35 graphs; this is a strong generalization assumption given the tiny sample.
  • domain assumption The Trusthub and DarkRISCV designs with injected trojans are representative of real hardware trojans.
    Section IV-B; trojan injection is described in Section III-A, but real trojans may differ structurally.
  • domain assumption Pyverilog correctly parses and analyzes the Verilog designs.
    Section III-B relies on Pyverilog; parser errors would corrupt the graphs.

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Cite this review

Pith. "Pith review of TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs." pith.science (2026). https://pith.science/paper/TEKIJC7C

@misc{pith2026250617894,
  author       = {Pith},
  title        = {Pith review of: TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/TEKIJC7C}},
  note         = {Machine review of arXiv:2506.17894}
}
read the original abstract

Chip manufacturing is a complex process, and to achieve a faster time to market, an increasing number of untrusted third-party tools and designs from around the world are being utilized. The use of these untrusted third party intellectual properties (IPs) and tools increases the risk of adversaries inserting hardware trojans (HTs). The covert nature of HTs poses significant threats to cyberspace, potentially leading to severe consequences for national security, the economy, and personal privacy. Many graph neural network (GNN)-based HT detection methods have been proposed. However, they perform poorly on larger designs because they rely on training with smaller designs. Additionally, these methods do not explore different GNN models that are well-suited for HT detection or provide efficient training and inference processes. We propose a novel framework that generates graph embeddings for large designs (e.g., RISC-V) and incorporates various GNN models tailored for HT detection. Furthermore, our framework introduces domain-specific techniques for efficient training and inference by implementing model quantization. Model quantization reduces the precision of the weights, lowering the computational requirements, enhancing processing speed without significantly affecting detection accuracy. We evaluate our framework using a custom dataset, and our results demonstrate a precision of 98.66% and a recall (true positive rate) of 92.30%, highlighting the effectiveness and efficiency of our approach in detecting hardware trojans in large-scale chip designs

Figures

Figures reproduced from arXiv: 2506.17894 by the authors.

Figure 1
Figure 1. Framework: (a) RTL hardware design (example, full addder, (b) Graph embedding with node features creation, (c) GNN models and efficient training [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. (a) Trojan signal declaration and condition, (b) Trojan trigger [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 4
Figure 4. (a) Input Graph, (b) GNN: Node aggregate and update [PITH_FULL_IMAGE:figures/full_fig_p004_4.png] view at source ↗
Figures from the paper (4 more)
Figure 5
Figure 5. Figure 5: Dataset distribution and 5-layer models for GCN, GAT, and GIN [PITH_FULL_IMAGE:figures/full_fig_p005_5.png]
Figure 6
Figure 6. Figure 6: Evaluation results in comparison with different models: (a) Accuracy, (b) Precision , (c) F1-Scores, (d) Recall [PITH_FULL_IMAGE:figures/full_fig_p006_6.png]
Figure 7
Figure 7. Figure 7: Evaluation results in comparison with SOTAs: (a) Precision, (b) Recall, (c) F1-Scores; SOTA1= [33] and SOTA2= [2] [PITH_FULL_IMAGE:figures/full_fig_p007_7.png]
Figure 8
Figure 8. Figure 8: Quantized GNN model results with: (a) GCN-2 , (b) GIN-5 [PITH_FULL_IMAGE:figures/full_fig_p007_8.png]

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Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL

    cs.LG 2026-03 conditional novelty 6.0 of 10

    Training on filtered, functionally imperfect LLM-generated RTL netlists lets GNNs match or beat models trained on scarce clean netlist data for sub-circuit identification.

Reference graph

Works this paper leans on

36 extracted references · 31 canonical work pages · cited by 1 Pith paper

  1. [1]

    https://trust-hub.org/#/benchmarks/ chip-level-trojan

    Chip-level trojan benchmarks. https://trust-hub.org/#/benchmarks/ chip-level-trojan

    work page

  2. [2]

    Deep learning based graph neural network technique for hardware trojan detection at register transfer level

    Anindita Chattopadhyay, Siddharth Bisariya, Anantram Patel, Sowmya Sunkara, and Vijay Kumar Sutrakar. Deep learning based graph neural network technique for hardware trojan detection at register transfer level. In2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA), pages 1–5, 2024

    work page 2024

  3. [3]

    Gnn4ht: A two-stage gnn based approach for hardware trojan multifunctional classification.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024

    Lihan Chen, Chen Dong, Qiaowen Wu, Ximeng Liu, Xiaodong Guo, Zhenyi Chen, Hao Zhang, and Yang Yang. Gnn4ht: A two-stage gnn based approach for hardware trojan multifunctional classification.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024

    work page 2024

  4. [4]

    Security vulnerability analysis of design-for- test exploits for asset protection in socs

    Gustavo K Contreras, Adib Nahiyan, Swarup Bhunia, Domenic Forte, and Mark Tehranipoor. Security vulnerability analysis of design-for- test exploits for asset protection in socs. In2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), pages 617–

    work page

  5. [5]

    Darkriscv

    Darklife. Darkriscv. https://github.com/darklife/darkriscv

    work page

  6. [6]

    Qlora: Efficient finetuning of quantized llms.ArXiv, abs/2305.14314, 2023

    Tim Dettmers, Artidoro Pagnoni, Ari Holtzman, and Luke Zettlemoyer. Qlora: Efficient finetuning of quantized llms.ArXiv, abs/2305.14314, 2023

    arXiv 2023

  7. [7]

    Spqr: A sparse-quantized representation for near- lossless llm weight compression.arXiv preprint arXiv:2306.03078, 2023

    Tim Dettmers, Ruslan Svirschevski, Vage Egiazarian, Denis Kuznedelev, Elias Frantar, Saleh Ashkboos, Alexander Borzunov, Torsten Hoefler, and Dan Alistarh. Spqr: A sparse-quantized representation for near- lossless llm weight compression.arXiv preprint arXiv:2306.03078, 2023

    arXiv 2023

  8. [8]

    Llm4sechw: Leveraging domain-specific large language model for hardware debugging

    Weimin Fu, Kaichen Yang, Raj Gautam Dutta, Xiaolong Guo, and Gang Qu. Llm4sechw: Leveraging domain-specific large language model for hardware debugging. In2023 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), pages 1–6. IEEE, 2023

    work page 2023

Show all 36 references
  1. [9]

    Node-wise hardware trojan detection based on graph learning.IEEE Transactions on Computers, 2023

    Kento Hasegawa, Kazuki Yamashita, Seira Hidano, Kazuhide Fukushima, Kazuo Hashimoto, and Nozomu Togawa. Node-wise hardware trojan detection based on graph learning.IEEE Transactions on Computers, 2023

    2023

  2. [10]

    Graph centrality algorithms for hardware trojan detection at gate-level netlists.International Journal of Engineering, 35(7):1375– 1387, 2022

    Mona Hashemi, Amirabbas Momeni, A Pashrashid, and Siamak Mo- hammadi. Graph centrality algorithms for hardware trojan detection at gate-level netlists.International Journal of Engineering, 35(7):1375– 1387, 2022

    2022

  3. [11]

    How secure is your cache against side-channel attacks? InProceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, pages 341–353, 2017

    Zecheng He and Ruby B Lee. How secure is your cache against side-channel attacks? InProceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, pages 341–353, 2017

    2017

  4. [12]

    Howard, Hartwig Adam, and Dmitry Kalenichenko

    Benoit Jacob, Skirmantas Kligys, Bo Chen, Menglong Zhu, Matthew Tang, Andrew G. Howard, Hartwig Adam, and Dmitry Kalenichenko. Quantization and training of neural networks for efficient integer- arithmetic-only inference.2018 IEEE/CVF Conference on Computer Vision and Pattern ...

    2018

  5. [13]

    Kipf and Max Welling

    Thomas N. Kipf and Max Welling. Semi-supervised classification with graph convolutional networks, 2017

    2017

  6. [14]

    Gnn-based hierarchical annotation for analog circuits.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 42(9):2801–2814, 2023

    Kishor Kunal, Tonmoy Dhar, Meghna Madhusudan, Jitesh Poojary, Arvind K Sharma, Wenbin Xu, Steven M Burns, Jiang Hu, Ramesh Harjani, and Sachin S Sapatnekar. Gnn-based hierarchical annotation for analog circuits.IEEE Transactions on Computer-Aided Design of Integrated Circuits ...

    2023

  7. [15]

    Evaluation on hardware-trojan detection at gate-level ip cores utilizing machine learning methods

    Tatsuki Kurihara, Kento Hasegawa, and Nozomu Togawa. Evaluation on hardware-trojan detection at gate-level ip cores utilizing machine learning methods. In2020 IEEE 26th International Symposium on On- Line Testing and Robust System Design (IOLTS), pages 1–4. IEEE, 2020

    2020

  8. [16]

    A reduction of a graph to a canonical form and an algebra arising during this reduction.Nauchno- Technicheskaya Informatsiya, 2(9):12–16, 1968

    Andrei Leman and Boris Weisfeiler. A reduction of a graph to a canonical form and an algebra arising during this reduction.Nauchno- Technicheskaya Informatsiya, 2(9):12–16, 1968

    1968

  9. [17]

    Gnn-based hardware trojan detection at register transfer level leveraging multiple-category features.IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024

    Peijun Ma, Ge Shang, Hongjin Liu, Jiangyi Shi, Weitao Pan, Yan Zhang, and Yue Hao. Gnn-based hardware trojan detection at register transfer level leveraging multiple-category features.IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024

    2024

  10. [18]

    Online planner selection with graph neural networks and adaptive scheduling

    Tengfei Ma, Patrick Ferber, Siyu Huo, Jie Chen, and Michael Katz. Online planner selection with graph neural networks and adaptive scheduling. InProceedings of the AAAI Conference on Artificial Intelligence, volume 34, pages 5077–5084, 2020

    2020

  11. [19]

    Security and trust vulnerabilities in third-party ips.Hardware IP Security and Trust, pages 3–14, 2017

    Prabhat Mishra, Mark Tehranipoor, and Swarup Bhunia. Security and trust vulnerabilities in third-party ips.Hardware IP Security and Trust, pages 3–14, 2017

    2017

  12. [20]

    Adib Nahiyan, Farimah Farahmandi, Prabhat Mishra, Domenic Forte, and Mark Tehranipoor. Security-aware fsm design flow for identifying and mitigating vulnerabilities to fault attacks.IEEE Transactions on Computer-aided design of integrated circuits and systems, 38(6):1003– 1016, 2018

    2018

  13. [21]

    Avfsm: A framework for identifying and mitigating vulnerabilities in fsms

    Adib Nahiyan, Kan Xiao, Kun Yang, Yeir Jin, Domenic Forte, and Mark Tehranipoor. Avfsm: A framework for identifying and mitigating vulnerabilities in fsms. InProceedings of the 53rd Annual Design Automation Conference, pages 1–6, 2016

    2016

  14. [22]

    Ryotaro Negishi, Tatsuki Kurihara, and Nozomu Togawa. Hardware- trojan detection at gate-level netlists using a gradient boosting decision tree model and its extension using trojan probability propagation.IEICE Transactions on Fundamentals of Electronics, Communications and Co...

    2024

  15. [23]

    Power side-channel leakage assessment framework at register- transfer level.IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 30(9):1207–1218, 2022

    Nitin Pundir, Jungmin Park, Farimah Farahmandi, and Mark Tehra- nipoor. Power side-channel leakage assessment framework at register- transfer level.IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 30(9):1207–1218, 2022

    2022

  16. [24]

    System-on-chip platform security assurance: Architecture and validation

    Sandip Ray, Eric Peeters, Mark M Tehranipoor, and Swarup Bhunia. System-on-chip platform security assurance: Architecture and validation. Proceedings of the IEEE, 106(1):21–37, 2017

    2017

  17. [25]

    Llm for soc security: A paradigm shift.IEEE Access, 2024

    Dipayan Saha, Shams Tarek, Katayoon Yahyaei, Sujan Kumar Saha, Jingbo Zhou, Mark Tehranipoor, and Farimah Farahmandi. Llm for soc security: A paradigm shift.IEEE Access, 2024

    2024

  18. [26]

    Graph of circuits with gnn for exploring the optimal design space

    Aditya Shahane, Saripilli Swapna Manjiri, Ankesh Jain, and Sandeep Kumar. Graph of circuits with gnn for exploring the optimal design space. In A. Oh, T. Naumann, A. Globerson, K. Saenko, M. Hardt, and S. Levine, editors,Advances in Neural Information Processing Systems, volum...

    2023

  19. [27]

    No change, no gain: empow- ering graph neural networks with expected model change maximization for active learning.Advances in Neural Information Processing Systems, 36, 2024

    Zixing Song, Yifei Zhang, and Irwin King. No change, no gain: empow- ering graph neural networks with expected model change maximization for active learning.Advances in Neural Information Processing Systems, 36, 2024

    2024

  20. [28]

    Pyverilog: A python-based hardware design processing toolkit for verilog hdl

    Shinya Takamaeda-Yamazaki. Pyverilog: A python-based hardware design processing toolkit for verilog hdl. InInternational Workshop on Applied Reconfigurable Computing, 2015

    2015

  21. [29]

    A survey of hardware trojan taxonomy and detection.IEEE design & test of computers, 27(1):10–25, 2010

    Mohammad Tehranipoor and Farinaz Koushanfar. A survey of hardware trojan taxonomy and detection.IEEE design & test of computers, 27(1):10–25, 2010

    2010

  22. [30]

    Choosing a classical planner with graph neural networks

    Jana Vatter, Ruben Mayer, Hans-Arno Jacobsen, Horst Samulowitz, and Michael Katz. Choosing a classical planner with graph neural networks. arXiv preprint arXiv:2402.04874, 2024

    2024 arXiv

  23. [31]

    Graph attention networks.arXiv preprint arXiv:1710.10903, 2017

    Petar Veli ˇckovi´c, Guillem Cucurull, Arantxa Casanova, Adriana Romero, Pietro Lio, and Yoshua Bengio. Graph attention networks.arXiv preprint arXiv:1710.10903, 2017

    2017 arXiv

  24. [32]

    How powerful are graph neural networks?arXiv preprint arXiv:1810.00826, 2018

    Keyulu Xu, Weihua Hu, Jure Leskovec, and Stefanie Jegelka. How powerful are graph neural networks?arXiv preprint arXiv:1810.00826, 2018

    2018 arXiv

  25. [33]

    Hardware trojan detection using graph neural networks

    Rozhin Yasaei, Luke Chen, Shih-Yuan Yu, and Mohammad Abdullah Al Faruque. Hardware trojan detection using graph neural networks. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022

    2022

  26. [34]

    Gnn4tj: Graph neural networks for hardware trojan detection at register transfer level

    Rozhin Yasaei, Shih-Yuan Yu, and Mohammad Abdullah Al Faruque. Gnn4tj: Graph neural networks for hardware trojan detection at register transfer level. In2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), pages 1504–1509. IEEE, 2021

    2021

  27. [35]

    Hw2vec: A graph learning tool for automating hardware security, 2021

    Shih-Yuan Yu, Rozhin Yasaei, Qingrong Zhou, Tommy Nguyen, and Mohammad Abdullah Al Faruque. Hw2vec: A graph learning tool for automating hardware security, 2021

    2021

  28. [36]

    Hydrogen jet and dif- fusion modeling by physics-informed graph neural network.Renewable and Sustainable Energy Reviews, 207:114898, 2025

    Xinqi Zhang, Jihao Shi, Junjie Li, Xinyan Huang, Fu Xiao, Qiliang Wang, Asif Sohail Usmani, and Guoming Chen. Hydrogen jet and dif- fusion modeling by physics-informed graph neural network.Renewable and Sustainable Energy Reviews, 207:114898, 2025

    2025

Pith tools

Reviewed August 6, 2026 · model on record in the stance chip above.