Pith. sign in

REVIEW 3 major objections 5 minor 1 cited by

Fully Parallelized BP Decoding for Quantum LDPC Codes Can Outperform BP-OSD

T0 review · 3 major / 5 minor · reviewed 2026-08-06 · deepseek-v4-flash

Challenge this review Re-run · record.json Download PDF Read on arXiv ↗

Pith's one-line read BP-SF, a fully parallel syndrome-flipping decoder, matches BP-OSD logical error rates on quantum LDPC codes at about 70% of the latency on the [[144,12,12]] code.

desk verdict A solid, reproducible decoder that replaces OSD with parallel syndrome flipping, with one unvalidated coset assumption worth probing. read the letter →

arxiv 2507.00254 v3 pith:74QJL2QV submitted 2025-06-30 quant-ph cs.ITmath.IT

Ming Wang , Ang Li , Frank Mueller This is my paper
classification quant-phcs.ITmath.IT PACS 03.67.Pp
keywords quantumLDPCcodesbeliefpropagationdecodingBP-OSDsyndromeflippingoscillatingbitsChasecodedegeneracylatency
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

Quantum LDPC codes need decoders that are both accurate and fast enough for real-time error correction, but the standard high-accuracy decoder, BP-OSD, pays for performance with an $O(N^3)$ Gaussian elimination step. This paper claims that most BP failures on qLDPC codes are caused by a few oscillating bits, and that flipping those bits in the syndrome domain produces modified decoding problems on which short BP runs converge quickly. Because qLDPC codes are degenerate, the authors argue that any trial that satisfies the syndrome is very likely to land in the correct logical coset, so no maximum-likelihood selection is needed; the decoder just returns the first successful trial. The resulting decoder, BP-SF, is fully parallel and matches or beats BP-OSD's logical error rate on bivariate bicycle and related codes while reducing measured latency, for example to about 70% of BP-OSD on the $[[144,12,12]]$ code.

What carries the argument

The load-bearing object is the oscillation-guided syndrome-flip trial mechanism. During min-sum BP with adaptive damping, the decoder counts, per bit, how often the hard decision changes from one iteration to the next; after a failed decode it selects the most frequently flipping bits as candidates $\Phi$. Each candidate set generates trial syndromes by flipping selected bits in the syndrome, each trial is decoded by a short BP run, and a successful trial has its flipped bits undone in the output. The mechanism is Chase-like in that it creates many independent decoding attempts, but it replaces Chase's channel-based reliability ordering with BP's own oscillation statistics and replaces maximum-likelihood selection with the degeneracy argument that any syndrome-satisfying solution probably belongs to the correct coset because low-weight codewords rarely form logical operators of weight at least $d$.

What would settle it

Simulate thousands of errors, and whenever the first BP pass fails, record whether the first returned syndrome-matching trial lies in the same logical class as the true error; if wrong-class returns occur at a rate comparable to the target logical error rate, the shortcut, not trial coverage, is what caps performance.

Watch

Extended reading notes

Core claim

BP-SF replaces the OSD phase of BP-OSD with speculative syndrome flipping. The decoder tracks how often each bit flips during a first BP attempt; if that attempt fails, it takes the top $|\Phi|$ most oscillating bits, generates trial vectors by flipping combinations of those bits in the syndrome, runs a short BP decode on each modified syndrome in parallel, flips the chosen bits back in the output, and returns the first syndrome-satisfying error. The paper's central claim is that this procedure achieves logical error rates comparable to or better than BP1000-OSD10 without any Gaussian elimination, on the $[[72,12,6]]$, $[[144,12,12]]$, $[[288,12,18]]$, $[[126,12,10]]$, and $[[154,6,16]]$ bivariate bicycle codes, the $[[225,16,8]]$ SHYPS code, and the $[[254,28]]$ generalized bicycle code. Under the circuit-level noise model the decoder needs more trials to match BP-OSD, but it still does so at lower average latency; under the code-capacity model it can even outperform BP-OSD, as on the $[[154,6,16]]$ code.

Load-bearing premise

The load-bearing bet is that any error pattern the decoder finds that matches the measured syndrome is almost certainly logically equivalent to the true error, so it can skip the step of choosing the most likely pattern and simply return the first successful attempt.

Editorial extensions

If this is right

  • Gaussian elimination can be dropped from high-accuracy qLDPC decoding on the tested code families without sacrificing logical error rate, removing the $O(N^3)$ bottleneck that makes BP-OSD hard to deploy in real time.
  • Because all trial decodes after the first BP run are independent, wall-clock latency falls as parallelism grows; on $[[144,12,12]]$ average latency is about 70% of BP-OSD, and parallel post-processing cuts average latency by 55% and maximum latency to 18% of the serial version.
  • Oscillation statistics are a cheap, effective predictor of error location: the top oscillating bits have hit precision far above the physical error rate and near-complete recall at low error rates, so they are useful targets for post-processing.
  • BP-SF carries over to multiple qLDPC families beyond the original bivariate bicycle codes, including coprime bivariate bicycle, SHYPS, and generalized bicycle codes, and in some code-capacity cases beats the BP1000-OSD10 baseline.
  • The decoder's complexity is tunable through the trial-weight limit $w_{\max}$ and sample count $n_s$, giving a predictable trade-off between iteration budget and logical error rate that is useful for resource-constrained hardware.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The paper's simulations measure end-to-end latency but do not isolate the wrong-coset rate; a direct experiment counting how often the first returned trial differs from the true error by a logical operator would test whether the degeneracy shortcut, rather than trial coverage, is the performance ceiling.
  • The oscillation heuristic is demonstrated under depolarising noise; applying BP-SF to biased or spatially correlated noise models would show whether the correlation between oscillating bits and true error locations survives outside the tested noise model.
  • The decoder's parallel trial structure suggests a hardware-friendly middle ground: instead of full OSD, one could add a cheap syndrome-based coset check on the first successful trial to guard against wrong-coset returns while keeping most of the latency advantage.
Share X Bluesky LinkedIn Reddit HN

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 5 minor

Summary. This paper introduces BP-SF, a belief-propagation (BP) decoder for quantum LDPC codes that uses oscillation statistics from a failed BP run to identify unreliable bits, then speculatively flips those bits in the syndrome domain and launches multiple short BP decoding trials in parallel. The first trial that returns a syndrome-satisfying estimate is output, without maximum-likelihood selection. The authors claim that this 'syndrome flip' approach achieves logical error rates comparable to BP-OSD while avoiding Gaussian elimination, and they provide serial CPU, parallel CPU, and an estimated GPU implementation. Simulation results on several bivariate bicycle codes, a coprime-BB code, a GB code, and a SHYPS code under code-capacity and circuit-level noise support comparable LER and lower latency, with the [[144,12,12]] code showing about 70% of BP-OSD latency at p=0.003.

Significance. If the central heuristic holds, the result is significant for real-time quantum error correction: it demonstrates that the expensive OSD post-processing can be replaced by a parallelizable, hardware-friendly Chase-like syndrome-flipping scheme. The paper's strengths are its concrete complexity analysis, the public code artifact with reproduction scripts, and the detailed evaluation across multiple code families. The main risk is the unvalidated assumption that any syndrome-satisfying solution is likely to be in the correct logical coset; if a wrong-coset floor exists at low physical error rates, the claimed LER parity would break. The paper would be substantially stronger with a direct diagnostic of wrong-coset convergence and a parameter-sensitivity study.

major comments (3)
  1. [Section IV] The decision to omit maximum-likelihood selection rests on the claim that 'any solution that satisfies the syndrome is likely to belong to the correct coset' (Section IV, immediately before Algorithm 1). This claim is load-bearing but never directly tested. The LER curves in Figs. 5-11 only show end-to-end performance; they do not report the fraction of converged trials for which e_hat XOR e is a nontrivial logical operator, nor how this fraction scales with p. Because BP convergence is biased by trapping sets (the oscillation analysis in Fig. 3 does not establish coset correctness), a wrong-coset floor cannot be ruled out from the existing data. Please add an ablation that reports the wrong-coset fraction as a function of p for the tested codes, and discuss whether it decays fast enough to support the low-error-regime claim.
  2. [Section V] The decoder's settings (|Phi|, w_max, n_s, BP iteration cap, and layered versus flooding BP) are chosen separately for each code and noise model (see Figs. 5-11). No procedure is described for selecting these values, and no sensitivity analysis shows how performance degrades with suboptimal choices. Since BP-OSD is run with a fixed OSD order of 10, the comparison is not apples-to-apples unless the tuning cost is negligible or the method is robust. Please report the selection methodology and, ideally, test a single fixed parameter set across all codes to support the claim that BP-SF 'can outperform BP-OSD' as an algorithm, not as a tuned instance.
  3. [Section VI] The GPU results are estimates, not measurements. The 'Estimated GPU version' precomputes oscillation bits on the CPU and decodes trials serially with CUDA-Q, and the text explicitly calls it a pessimistic upper bound. Nevertheless, the abstract and conclusion present the latency reduction without this qualification, and the title claims 'fully parallelized.' Please either implement the batch-based GPU version or clearly separate estimated GPU numbers from measured CPU numbers in all claims, including the abstract and conclusion.
minor comments (5)
  1. [Sections III and V] The adaptive damping factor is written as α = 1 − 2i, which is negative for i > 0; presumably the intended expression is α = 1 − 2^{-i}. Please correct this in all occurrences.
  2. [Figure 7] The legend label 'BF-SF' should be 'BP-SF'.
  3. [Section V] The LER plots omit error bars. With at least 100 logical errors per point, confidence intervals would help assess whether the small differences between BP-SF and BP-OSD are significant, particularly in Figs. 7-10.
  4. [Abstract] The abstract's latency percentages ('approximately 70%', '55% reduction') are not qualified by code, physical error rate, or platform; please state the conditions under which these numbers hold.
  5. [Throughout] The notation 'J144,12,12K' for [[n,k,d]] is nonstandard and may confuse readers; consider using the conventional double-bracket notation.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: BP-SF is an empirical algorithmic comparison benchmarked against external BP-OSD; performance claims are measured, not derived from their inputs.

full rationale

The paper's central claims are empirical: BP-SF is simulated against an external BP-OSD baseline from the LDPC library and CUDA-Q, and the reported logical error rates and latencies are direct measurements rather than predictions derived from fitted parameters. The oscillation-guided candidate selection is an observed heuristic validated by simulation data in Figure 3, not an equation that assumes its own conclusion. The decision to omit maximum-likelihood selection is an explicitly stated assumption ('any solution that satisfies the syndrome is likely to belong to the correct coset'), but the paper tests this indirectly through LER curves against an independent baseline; the assumption is load-bearing for correctness but not circular in the sense of being equivalent to the input. The self-citations ([32], [33]) appear only as a source for code constructions and an unrelated decoding method; neither is used to justify the main performance claim or to import an unverified uniqueness theorem. Parameter choices (w_max, |Phi|, n_s) are tuned to match BP-OSD performance, but the paper presents these as configuration choices for an empirical comparison, not as a fit disguised as a prediction. No circular step meeting the required evidentiary standard can be exhibited.

Assumptions & free parameters 5 free parameters · 4 assumptions · 0 invented entities

No new physical or mathematical entities are introduced; the ledger shows the tuned hyperparameters and the two heuristic assumptions on which the performance claim rests.

free parameters (5)
  • Candidate set size |Phi| = 8 to 50 depending on code and noise model
    Number of most-oscillating bits selected after a failed BP run; set by hand per code, e.g., |Phi|=8 for [[154,6,16]] code-capacity and |Phi|=50 for circuit-level runs.
  • Max flip weight w_max = 1 for most code-capacity runs; 4 to 10 for circuit-level runs
    Maximum number of syndrome bits flipped per trial; increased until LER is comparable to BP-OSD.
  • Trial vectors per weight n_s = 5 or 10
    Number of random trial syndromes sampled per weight in circuit-level decoding; larger n_s lowers LER at higher iteration cost.
  • Max BP iterations per BP instance = 50 or 100
    Cap on message-passing iterations; chosen per experiment to trade LER against latency.
  • Adaptive damping schedule exponent = 1 - 2^{-i}
    Damping factor schedule for min-sum BP; fixed by the authors and used across experiments.
assumptions (4)
  • domain assumption Oscillating bits are a reliable proxy for true error locations
    Load-bearing heuristic validated only on [[144,12,12]] in Fig. 3; the decoder applies it to all codes and noise models.
  • domain assumption Any syndrome-consistent BP solution is likely in the correct logical coset
    Stated in Section IV; motivates dropping ML selection. Not proven, and it is exactly what makes returning the first valid solution safe.
  • standard math CSS codes can be decoded by treating X and Z errors as two independent classical problems
    Standard CSS construction used in Section II; assumed throughout.
  • domain assumption Min-sum BP failures are dominated by trapping sets and oscillations
    Motivates the entire method; supported by empirical analysis on one code and generalized to others.

how reviews work

0 comments
Cite this review

Pith. "Pith review of Fully Parallelized BP Decoding for Quantum LDPC Codes Can Outperform BP-OSD." pith.science (2026). https://pith.science/paper/74QJL2QV

@misc{pith2026250700254,
  author       = {Pith},
  title        = {Pith review of: Fully Parallelized BP Decoding for Quantum LDPC Codes Can Outperform BP-OSD},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/74QJL2QV}},
  note         = {Machine review of arXiv:2507.00254}
}
abstract

This work presents a hardware-efficient and fully parallelizable decoder for quantum LDPC codes that leverages belief propagation (BP) with a speculative post-processing strategy inspired by classical Chase decoding algorithm. By monitoring bit-level oscillation patterns during BP, our method identifies unreliable bits and generates multiple candidate vectors to selectively flip syndromes. Each modified syndrome is then decoded independently using short-depth BP, a process we refer to as BP-SF (syndrome flip). This design eliminates the need for costly Gaussian elimination used in the current BP-OSD approaches. Our implementation achieves logical error rates comparable to or better than BP-OSD while offering significantly lower latency due to its high degree of parallelism for a variety of bivariate bicycle codes. Evaluation on the [[144,12,12]] bivariate bicycle code shows that the proposed decoder reduces average latency to approximately $70\%$ of BP-OSD. When post-processing is parallelized the average latency is reduced by $55\%$ compared to the single process implementation, with the maximum latency reaching as low as $18\%$. These advantages make it particularly well-suited for real-time and resource-constrained quantum error correction systems.

Figures

Figures reproduced from arXiv: 2507.00254 by the authors.

Figure 1
Figure 1. (a) Example of BP failing to converge due to oscillations. Red Xs denote bits identified as erroneous by BP, and yellow [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. shows the ratio of syndromes failed to converge under the circuit-level noise model, where p denotes the physical error rate. The curves are obtained by simulating 10,000 samples for each of p = 0.001 and p = 0.002, both representative values below the threshold. For each sample, we record the number of iterations required for convergence and compute the cumulative distribution. This non-convergence rate at iteratio… view at source ↗
Figure 3
Figure 3. Precision and recall probabilities of candidate bit [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figures from the paper (11 more)
Figure 5
Figure 5. Figure 5: shows the logical error rates of different decoders on the J154, 6, 16K coprime-BB code under the code capacity noise model. For our BP-SF decoder, the candidate set size is set to |Φ| = 8, resulting in a maximum of 50 × (8 + 1) = 450 BP iterations per decoding attempt…
Figure 6
Figure 6. Figure 6: Error rates of the J288, 12, 18K BB code under the code capacity model. B. Circuit-Level Noise Model Under the circuit-level noise model, errors are injected uniformly across gates and measurements. They can propagate through the circuit as it runs. We use Stim [10] to…
Figure 8
Figure 8. Figure 8: shows the logical error rates (LER) of different decoders on the J288, 12, 18K BB code under the circuit-level 10 3 10 2 Physical Error Rate (p) 10 7 10 6 10 5 10 4 10 3 10 2 10 1 10 0 Logical Error Rate Per Round (LER/Round) BB [[144, 12, 12]] LER/Round=p BF-SF, BP100…
Figure 11
Figure 11. Figure 11: Error rates of the J225, 16, 8K SHYPS code under the circuit-level noise model. C. Complexity and Parameter Selection Next, we analyze the computational complexity of our BP-SF decoder. To ensure a fair comparison with baseline methods, we measure the average number o…
Figure 10
Figure 10. Figure 10: shows the logical error rates of different decoders on the J126, 12, 10K coprime-BB code under the circuit-level noise model. Our BP-SF decoder uses up to approximately 3,000 BP iterations to achieve a logical error rate comparable to that of the BP1000-OSD10 decoder.…
Figure 12
Figure 12. Figure 12: Complexity growth of different decoders. The param [PITH_FULL_IMAGE:figures/full_fig_p009_12.png]
Figure 13
Figure 13. Figure 13: Latency scaling of BP-SF and BP-OSD at a physical [PITH_FULL_IMAGE:figures/full_fig_p009_13.png]
Figure 14
Figure 14. Figure 14: Average decoding time per syndrome for the BP-SF [PITH_FULL_IMAGE:figures/full_fig_p010_14.png]
Figure 15
Figure 15. Figure 15: Distribution of single-syndrome decoding times for [PITH_FULL_IMAGE:figures/full_fig_p011_15.png]
Figure 16
Figure 16. Figure 16: Distribution of single-syndrome decoding times for [PITH_FULL_IMAGE:figures/full_fig_p011_16.png]
Figure 17
Figure 17. Figure 17: (a-b): The logical error rates of different codes under code capacity error model. For the [PITH_FULL_IMAGE:figures/full_fig_p013_17.png]

Discussion (0). Sign in to comment.

Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Degeneracy Cutting: A Local and Efficient Post-Processing for Belief Propagation Decoding of Quantum Low-Density Parity-Check Codes

    quant-ph 2025-10 conditional novelty 6.0 of 10

    A local O(n) post-processor called degeneracy cutting prunes one low-probability qubit per stabilizer and reruns belief propagation, matching or beating BP+OSD accuracy in several qLDPC settings.

Reference graph

Works this paper leans on

39 extracted references · 18 canonical work pages · cited by 1 Pith paper

  1. [1]

    On the inherent intractability of certain coding problems (corresp.),

    E. Berlekamp, R. McEliece, and H. van Tilborg, “On the inherent intractability of certain coding problems (corresp.),”IEEE Transactions on Information Theory, vol. 24, no. 3, pp. 384–386, 1978

    work page 1978

  2. [2]

    High-threshold and low-overhead fault-tolerant quantum memory,

    S. Bravyi, A. W. Cross, J. M. Gambetta, D. Maslov, P. Rall, and T. J. Yoder, “High-threshold and low-overhead fault-tolerant quantum memory,”Nature, vol. 627, no. 8005, p. 778–782, Mar. 2024

    work page 2024

  3. [3]

    Class of algorithms for decoding block codes with channel measurement information,

    D. Chase, “Class of algorithms for decoding block codes with channel measurement information,”IEEE Transactions on Information Theory, vol. 18, no. 1, pp. 170–182, 1972

    1972

  4. [4]

    Improved Belief Propagation Decoding Algorithms for Surface Codes ,

    J. Chen, Z. Yi, Z. Liang, and X. Wang, “ Improved Belief Propagation Decoding Algorithms for Surface Codes ,”IEEE Transactions on Quantum Engineering, vol. 6, no. 01, pp. 1–16, Jan. 2025. [Online]. Available: https://doi.ieeecomputersociety.org/10.1109/TQE. 2025.3577769

    arXiv 2025

  5. [5]

    Enhanced message-passing decoding of degenerate quantum codes utilizing trapping set dynamics,

    D. Chytas, M. Pacenti, N. Raveendran, M. F. Flanagan, and B. Vasi ´c, “Enhanced message-passing decoding of degenerate quantum codes utilizing trapping set dynamics,”IEEE Communications Letters, vol. 28, no. 3, pp. 444–448, 2024

    work page 2024

  6. [6]

    Lilliput: a lightweight low- latency lookup-table decoder for near-term quantum error correction,

    P. Das, A. Locharla, and C. Jones, “Lilliput: a lightweight low- latency lookup-table decoder for near-term quantum error correction,” inProceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, ser. ASPLOS ’22. New York, NY , USA: Association for Computing Machinery, 2022, p. 541–553. [...

    arXiv 2022

  7. [7]

    Afs: Accurate, fast, and scalable error- decoding for fault-tolerant quantum computers,

    P. Das, C. A. Pattison, S. Manne, D. M. Carmean, K. M. Svore, M. Qureshi, and N. Delfosse, “Afs: Accurate, fast, and scalable error- decoding for fault-tolerant quantum computers,” in2022 IEEE Interna- tional Symposium on High-Performance Computer Architecture (HPCA), 2022, pp. 259–273

    work page 2022

  8. [8]

    Low cost ldpc decoder for dvb-s2,

    J. Dielissen, A. Hekstra, and V . Berg, “Low cost ldpc decoder for dvb-s2,” inProceedings of the Design Automation & Test in Europe Conference, vol. 2, 2006, pp. 1–6

    work page 2006

Show all 39 references
  1. [9]

    Improved random redundant iterative hdpc decoding,

    I. Dimnik and Y . Be’ery, “Improved random redundant iterative hdpc decoding,”Trans. Comm., vol. 57, no. 7, p. 1982–1985, Jul. 2009. [Online]. Available: https://doi.org/10.1109/TCOMM.2009.07.070621

    1982 doi

  2. [10]

    Stim: a fast stabilizer circuit simulator,

    C. Gidney, “Stim: a fast stabilizer circuit simulator,”Quantum, vol. 5, p. 497, 2021

    2021

  3. [11]

    Toward low-latency iterative decoding of qldpc codes under circuit-level noise,

    A. Gong, S. Cammerer, and J. M. Renes, “Toward low-latency iterative decoding of qldpc codes under circuit-level noise,”arXiv preprint arXiv:2403.18901, 2024

    2024 arXiv

  4. [12]

    Random redundant soft-in soft-out decoding of linear block codes,

    T. R. Halford and K. M. Chugg, “Random redundant soft-in soft-out decoding of linear block codes,” in2006 IEEE International Symposium on Information Theory, 2006, pp. 2230–2234

    2006

  5. [13]

    Localized statistics decoding: A parallel decoding algo- rithm for quantum low-density parity-check codes,

    T. Hillmann, L. Berent, A. O. Quintavalle, J. Eisert, R. Wille, and J. Roffe, “Localized statistics decoding: A parallel decoding algo- rithm for quantum low-density parity-check codes,”arXiv preprint arXiv:2406.18655, 2024

    2024

  6. [14]

    Hardness of decoding quantum stabilizer codes,

    P. Iyer and D. Poulin, “Hardness of decoding quantum stabilizer codes,”IEEE Trans. Inf. Theor., vol. 61, no. 9, p. 5209–5223, Sep

  7. [15]

    Auto- morphism ensemble decoding of quantum ldpc codes,

    S. Koutsioumpas, H. Sayginel, M. Webster, and D. E. Browne, “Auto- morphism ensemble decoding of quantum ldpc codes,”arXiv preprint arXiv:2503.01738, 2025

    2025 arXiv

  8. [16]

    Computing efficiently in qldpc codes,

    A. J. Malcolm, A. N. Glaudell, P. Fuentes, D. Chandra, A. Schotte, C. DeLisle, R. Haenel, A. Ebrahimi, J. Roffe, A. O. Quin- tavalleet al., “Computing efficiently in qldpc codes,”arXiv preprint arXiv:2502.07150, 2025

    2025

  9. [17]

    Improved belief propagation is sufficient for real-time decoding of quantum memory,

    T. M ¨uller, T. Alexander, M. E. Beverland, M. B ¨uhler, B. R. John- son, T. Maurer, and D. Vandeth, “Improved belief propagation is sufficient for real-time decoding of quantum memory,”arXiv preprint arXiv:2506.01779, 2025

    2025 arXiv

  10. [18]

    Degenerate quantum LDPC codes with good finite length performance,

    P. Panteleev and G. Kalachev, “Degenerate quantum LDPC codes with good finite length performance,”Quantum, vol. 5, p. 585, 2021

    2021

  11. [19]

    On the iterative decoding of sparse quantum codes,

    D. Poulin and Y . Chung, “On the iterative decoding of sparse quantum codes,”arXiv preprint arXiv:0801.1241, 2008

    2008 arXiv

  12. [20]

    Trapping sets of quantum ldpc codes,

    N. Raveendran and B. Vasi ´c, “Trapping sets of quantum ldpc codes,” Quantum, vol. 5, p. 562, 2021

    2021

  13. [21]

    Design of capacity- approaching irregular low-density parity-check codes,

    T. Richardson, M. Shokrollahi, and R. Urbanke, “Design of capacity- approaching irregular low-density parity-check codes,”IEEE Transac- tions on Information Theory, vol. 47, no. 2, pp. 619–637, 2001

    2001

  14. [22]

    LDPC: Python tools for low density parity check codes,

    J. Roffe, “LDPC: Python tools for low density parity check codes,”

  15. [23]

    Decoding across the quantum low-density parity-check code landscape,

    J. Roffe, D. R. White, S. Burton, and E. Campbell, “Decoding across the quantum low-density parity-check code landscape,”Phys. Rev. Res., vol. 2, p. 043423, Dec 2020

    2020

  16. [24]

    A 58.6/91.3 pj/b dual-mode belief-propagation decoder for ldpc and polar codes in the 5g communi- cations standard,

    B.-S. Su, C.-H. Lee, and T.-D. Chiueh, “A 58.6/91.3 pj/b dual-mode belief-propagation decoder for ldpc and polar codes in the 5g communi- cations standard,”IEEE Solid-State Circuits Letters, vol. 5, pp. 98–101, 2022

    2022

  17. [25]

    Quantum error correction for quantum memories,

    B. M. Terhal, “Quantum error correction for quantum memories,”Rev. Mod. Phys., vol. 87, pp. 307–346, Apr 2015. [Online]. Available: https://link.aps.org/doi/10.1103/RevModPhys.87.307

    2015 doi

  18. [26]

    [Online]

    The CUDA-Q development team, “CUDA-Q,” https://github.com/ NVIDIA/cuda-quantum, NVIDIA, 2024. [Online]. Available: https: //github.com/NVIDIA/cuda-quantum

    2024

  19. [27]

    Quantum ldpc codes with positive rate and minimum distance proportional to the square root of the blocklength,

    J.-P. Tillich and G. Z ´emor, “Quantum ldpc codes with positive rate and minimum distance proportional to the square root of the blocklength,” IEEE Transactions on Information Theory, vol. 60, no. 2, pp. 1193– 1202, 2014

    2014

  20. [28]

    Syndrome- based min-sum vs osd-0 decoders: Fpga implementation and analysis for quantum ldpc codes,

    J. Valls, F. Garcia-Herrero, N. Raveendran, and B. Vasi ´c, “Syndrome- based min-sum vs osd-0 decoders: Fpga implementation and analysis for quantum ldpc codes,”IEEE Access, vol. 9, pp. 138 734–138 743, 2021

    2021

  21. [29]

    Swiper: Minimizing fault-tolerant quantum program latency via speculative window decoding,

    J. Viszlai, J. D. Chadwick, S. Joshi, G. S. Ravi, Y . Li, and F. T. Chong, “Swiper: Minimizing fault-tolerant quantum program latency via speculative window decoding,” inProceedings of the 52nd Annual International Symposium on Computer Architecture, ser. ISCA ’25. New York, N...

    2025 doi

  22. [30]

    Astrea: Accurate quantum error-decoding via practical minimum-weight perfect-matching,

    S. Vittal, P. Das, and M. Qureshi, “Astrea: Accurate quantum error-decoding via practical minimum-weight perfect-matching,” in Proceedings of the 50th Annual International Symposium on Computer Architecture, ser. ISCA ’23. New York, NY , USA: Association for Computing Machiner...

    2023

  23. [31]

    Flag-Proxy Networks: Overcoming the Architectural, Scheduling and Decoding Obstacles of Quantum LDPC Codes ,

    S. Vittal, A. Javadi-Abhari, A. W. Cross, L. S. Bishop, and M. Qureshi, “ Flag-Proxy Networks: Overcoming the Architectural, Scheduling and Decoding Obstacles of Quantum LDPC Codes ,” in2024 57th IEEE/ACM International Symposium on Microarchitecture (MICRO). Los Alamitos, CA, ...

    2024

  24. [32]

    Neural layered min-sum decoders for cyclic codes,

    M. Wang, Y . Li, J. Liu, T. Guo, H. Wu, and F. C. Lau, “Neural layered min-sum decoders for cyclic codes,”Physical Communication, vol. 61, p. 102194, 2023. [Online]. Available: https://www.sciencedirect.com/science/article/pii/S1874490723001970

    2023

  25. [33]

    Coprime bivariate bicycle codes and their properties,

    M. Wang and F. Mueller, “Coprime bivariate bicycle codes and their properties,”arXiv preprint arXiv:2408.10001, 2024

    2024

  26. [34]

    Ambiguity clustering: an accurate and efficient decoder for qldpc codes,

    S. Wolanski and B. Barber, “Ambiguity clustering: an accurate and efficient decoder for qldpc codes,”arXiv preprint arXiv:2406.14527, 2024

    2024 arXiv

  27. [35]

    Belief propagation decoding of quantum ldpc codes with guided decimation,

    H. Yao, W. A. Laban, C. H ¨ager, A. G. i. Amat, and H. D. Pfister, “Belief propagation decoding of quantum ldpc codes with guided decimation,” in2024 IEEE International Symposium on Information Theory (ISIT), 2024, pp. 2478–2483

    2024

  28. [36]

    Symbreak: Mitigating quantum degeneracy issues in qldpc code decoders by breaking symmetry,

    K. Yin, X. Fang, J. Ruan, H. Zhang, D. Tullsen, A. Sornborger, C. Liu, A. Li, T. Humble, and Y . Ding, “Symbreak: Mitigating quantum degeneracy issues in qldpc code decoders by breaking symmetry,”arXiv preprint arXiv:2412.02885, 2024

    2024 arXiv

  29. [37]

    An efficient 10gbase-t ethernet ldpc decoder design with low error floors,

    Z. Zhang, V . Anantharam, M. J. Wainwright, and B. Nikolic, “An efficient 10gbase-t ethernet ldpc decoder design with low error floors,” IEEE Journal of Solid-State Circuits, vol. 45, no. 4, pp. 843–855, 2010

    2010

  30. [2015]

    Available: https://doi.org/10.1109/TIT.2015.2422294

    [Online]. Available: https://doi.org/10.1109/TIT.2015.2422294

    2015

  31. [2022]

    Available: https://pypi.org/project/ldpc/

    [Online]. Available: https://pypi.org/project/ldpc/

Pith tools

Reviewed August 6, 2026 · model on record in the stance chip above.