Pith. sign in

Paper Citation Record · LEDGER

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design

As of 13 August 2026, this Paper Citation Record lists 29 of 29 outbound references and 0 inbound Pith citation observations for arXiv:2507.09965.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2507.09965 v1

Coverage vector

measured 29 of 29 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-06T17:48:53.908260Z

measured 29 of 29 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-12T06:34:41.77262+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

29 of 29 outbound references displayed

  • verified exact1
  • verified fuzzy25
  • unresolved3
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation c82d3a32-da43-41d5-9cee-3bd8dbc140aa · outbound

This paper cites Stimulus generation for constrained random simulation,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Stimulus generation for constrained random simulation,

Reference 1

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:58.208294Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:51.922840Z digest=sha256:2a1466bf73a11f364d4268258e18cbda6f6a094bb834da7efbc57adf5e7a2661

Observation 07de5ed3-63f1-4397-b8e6-e69b471f432b · outbound

This paper cites Au- toBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Au- toBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design,

Reference 2

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.931342Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.013275Z digest=sha256:ae8c9f8c2b98661a5d42cc16513a1cdd193d2282437d78f5dbcff31d2b624a9e

Observation 43a9214b-6a07-4bca-8141-0df76dee088b · outbound

This paper cites UVLLM: An Automated Universal RTL Verification Framework using LLMs,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design UVLLM: An Automated Universal RTL Verification Framework using LLMs,

Reference 3

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.740774Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.107163Z digest=sha256:2d89f3615ce116c6dbbb5bfed4159fb5a1e209b44a5d04531bdbb3d6fe67641b

Observation 86d6f883-65d4-4c93-9717-9b846395f737 · outbound

This paper cites Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation | IEEE Conference Publication | IEEE Xplore.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation | IEEE Conference Publication | IEEE Xplore

Reference 4

Resolution
verified exact
raw_fallback, observed 2026-08-06T17:48:54.226732Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.186242Z digest=sha256:03ff47eca99e4b316f41701b30d6c3ef9e4467de7f762cee5ca4ba40c8de9aad

Observation 96a00a75-f74f-4944-a9a2-49790a19f2da · outbound

This paper cites ChipGPT: How far are we from natural language hardware design,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design ChipGPT: How far are we from natural language hardware design,

Reference 5

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.491083Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.207939Z digest=sha256:3628c2f8f2f94f07a4956feb3ca83a8637d3134025f62f88b050d9ef6a00275c

Observation b0daac80-61cf-412d-872c-b252dba0209d · outbound

This paper cites Chip-Chat: Chal- lenges and Opportunities in Conversational Hardware Design,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Chip-Chat: Chal- lenges and Opportunities in Conversational Hardware Design,

Reference 6

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.312121Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.253777Z digest=sha256:42d425374f059bcf5ab897646de1cc19b758f5b5411aeb477ade28ae25977c2d

Observation 6d8301cf-e6c0-450a-97bb-c76dbbc85171 · outbound

This paper cites AutoChip: Automating HDL Generation Using LLM Feedback,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design AutoChip: Automating HDL Generation Using LLM Feedback,

Reference 7

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.120168Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.296256Z digest=sha256:79c35ed7edd4b6e961ff748468f36293e3373dee4eff16dcc0de807987f60340

Observation c71d55c1-d45d-4605-b72f-6413dbf21a9f · outbound

This paper cites Using LLMs to Facilitate Formal Verification of RTL.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Using LLMs to Facilitate Formal Verification of RTL

Reference 8

Resolution
unresolved
no resolver link, observed 2026-08-06T17:48:52.352163Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T17:48:52.352163Z digest=sha256:d1c070e6f20e33cf28405d1966cf29f2954248a6f8660be701474c770ce116b9

Observation 532e0e8f-0575-4d12-aef8-10331e0c2d13 · outbound

This paper cites LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation

Reference 9

Resolution
unresolved
no resolver link, observed 2026-08-06T17:48:52.389401Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T17:48:52.389401Z digest=sha256:1bd26dfa8cf41c30ec13e648b7944dcb5c4054ac12ca34b34cd8d70d828f31da

Observation 19bcaf43-835a-40d0-b195-8c3026a0ce1f · outbound

This paper cites TED: A Python-Based Analog Design Environment for Agile Circuit Development,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design TED: A Python-Based Analog Design Environment for Agile Circuit Development,

Reference 10

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.851701Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.462255Z digest=sha256:68fc2e558f6413d3746cd7582babf332027f8ef8dea3ff3013d21defabc0d499

Observation 6acca702-290e-4b51-8d60-b99205b31e34 · outbound

This paper cites Evaluating Large Language Models Trained on Code,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Evaluating Large Language Models Trained on Code,

Reference 11

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.622645Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.532168Z digest=sha256:785f347e6d8b1afe569e8ad538715c669d1e09549a2dde042956a47cc82019b3

Observation 78fcd3be-6cfd-42d0-975e-6d04ce7b2aeb · outbound

This paper cites Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model,

Reference 12

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.431122Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.617721Z digest=sha256:fb19bd8c33bfddbb4af04df184af259dbb893a54d329b103cacbf5abb511051e

Observation 6669524d-36b0-4438-8716-0b934bcb95cf · outbound

This paper cites LADAC: Large Language Model- driven Auto-Designer for Analog Circuits,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design LADAC: Large Language Model- driven Auto-Designer for Analog Circuits,

Reference 13

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.310124Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.698423Z digest=sha256:bc9887aeebc4b8c3f4976f8f01e431638230ca8d65fe56bd9522b760437154b9

Observation 962858f1-3bee-495f-b32e-6e44407abd24 · outbound

This paper cites AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting,

Reference 14

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.195860Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.770610Z digest=sha256:dca3fd65f000eded4dc7eaa6f0bf992dbb0be48753f468b63fa1e58e30907bb5

Observation a5f686bd-ae5e-4723-bef5-07a295b76be1 · outbound

This paper cites A Survey on Hallucination in Large Language Models: Principles, Taxonomy, Challenges, and Open Questions | ACM Transactions on Information Systems.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A Survey on Hallucination in Large Language Models: Principles, Taxonomy, Challenges, and Open Questions | ACM Transactions on Information Systems

Reference 15

Resolution
unresolved
no resolver link, observed 2026-08-06T17:48:52.857508Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T17:48:52.857508Z digest=sha256:4e167134b25b8ae79062177f31e6e176ca0c5505b92b3decf58271d0c147f6be

Observation 30a71d48-f396-444a-8dde-739d29547074 · outbound

This paper cites Analog design with verilog-a,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Analog design with verilog-a,

Reference 16

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.058683Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:52.950597Z digest=sha256:3901d10bb757f4b9ed1bd55c6c91c7f44a48b6d52519eee225883bb9fa60d935

Observation a17925a0-bae3-413e-a335-d855165c5319 · outbound

This paper cites Automated Generation Procedure for Fully Differ- ential Op-Amp Using TED,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Automated Generation Procedure for Fully Differ- ential Op-Amp Using TED,

Reference 17

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.908005Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.020617Z digest=sha256:1cce8951cdb67404f602dc42640edc5a11787eeab6cbeba1dfb3c4c67efb4422

Observation a04a440f-9248-4216-8749-dafa7c0bc04f · outbound

This paper cites LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits,

Reference 18

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.808487Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.075066Z digest=sha256:3ad74e85aa58c420cbdf99f947badf683c4c44560b7bb8a45e60bdc296b4076d

Observation 487090d6-55c8-4c03-a594-9932530b0790 · outbound

This paper cites ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Models,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Models,

Reference 19

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.709019Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.152774Z digest=sha256:1c0ef9e2917026ae8e3b29f98b2e9ad2c10e47d81f6187c67db303f49ca7608a

Observation b7da624c-412d-45b1-9cfa-4dad8b5b0c7c · outbound

This paper cites Masala- chai: A large-scale spice netlist dataset for analog circuits by harnessing ai,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Masala- chai: A large-scale spice netlist dataset for analog circuits by harnessing ai,

Reference 20

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.642234Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.207677Z digest=sha256:854f503e7b05aa09c5bdb2ac13c2addf8ba330600b57f4a5f5b27eaf8ac58ef0

Observation 86080fe5-c6c2-4d10-aea6-b938076bfd50 · outbound

This paper cites OpenAI Platform.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design OpenAI Platform

Reference 21

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.573662Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.268951Z digest=sha256:9cb34abab59edc1d61769d4d807b60637da154941f36786b13e14bd397c25b8e

Observation 2b8b8492-b3df-4f6a-8205-b5d9f815c4a0 · outbound

This paper cites An Ultra- Low-V oltage Ultra-Low-Power CMOS Miller OTA With Rail-to-Rail Input/Output Swing,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design An Ultra- Low-V oltage Ultra-Low-Power CMOS Miller OTA With Rail-to-Rail Input/Output Swing,

Reference 22

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.490828Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.354462Z digest=sha256:2e0f86ecb70ce29f617bee720c97273bc58473852f577cd1d73393bf2489d0d4

Observation 13d9d694-6b02-40b3-a1fa-fb0aa95c9735 · outbound

This paper cites 0.5-V operational transconductance amplifier for CMOS bandgap reference application,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design 0.5-V operational transconductance amplifier for CMOS bandgap reference application,

Reference 23

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.431182Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.463528Z digest=sha256:e3a960a691b2ef62904e62c6f123fd3e08845526a990112cb13a56c693922637

Observation cfab3fca-8594-4dad-b513-78495ea601c0 · outbound

This paper cites A Miller-compensated amplifier with Gm-boosting,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A Miller-compensated amplifier with Gm-boosting,

Reference 24

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.352534Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.562146Z digest=sha256:b31d10c4b5f690243ec4a7f6cc6c0513ad93fc43a58eca897e2945cfdb2790b5

Observation 11c420d1-c6f3-4043-92a0-ce1e24f24166 · outbound

This paper cites A CMOS 25.3 ppm ◦/C bandgap voltage reference using self-cascode composite transistor,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A CMOS 25.3 ppm ◦/C bandgap voltage reference using self-cascode composite transistor,

Reference 25

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.152669Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.629382Z digest=sha256:b5a4d9f2e43140f358c82640ccef4ef44ddd66c077c6f45d5f61e67ab8689c89

Observation 2a9e60d0-aa91-4976-bc26-ebd662794a0e · outbound

This paper cites A low-voltage low-power voltage reference based on subthreshold MOSFETs,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A low-voltage low-power voltage reference based on subthreshold MOSFETs,

Reference 26

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:54.861284Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.693632Z digest=sha256:10ae1dc25f86b2bb754d3c3b3eaceea3b8c01cc3df211c62da213eb37421b1fc

Observation 19c0eb34-27c9-4839-9d77-73e69d5e8a15 · outbound

This paper cites A 300 nW, 15 ppm/\circC, 20 ppm/V CMOS V oltage Reference Circuit Consisting of Subthreshold MOSFETs,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A 300 nW, 15 ppm/\circC, 20 ppm/V CMOS V oltage Reference Circuit Consisting of Subthreshold MOSFETs,

Reference 27

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:54.657059Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.752355Z digest=sha256:f6233625275b658c2366ff4dcd7e3fb7a6ca607217053c30c8e6c5148925ac9a

Observation f44413f2-b659-448c-9600-06a949bc9e56 · outbound

This paper cites A 65-nm CMOS Low Dropout Regulator Featuring >60-dB PSRR Over 10-MHz Frequency Range and 100-mA Load Current Range,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A 65-nm CMOS Low Dropout Regulator Featuring >60-dB PSRR Over 10-MHz Frequency Range and 100-mA Load Current Range,

Reference 28

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:54.486533Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.829126Z digest=sha256:2992743f31f485badd241ae8e0a6c01e93b227105d50d0b94f8e468b26ad597d

Observation d3e7519b-195e-42d9-95f0-e9816e6b2134 · outbound

This paper cites High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique,

Reference 29

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:54.351673Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-06T17:48:53.908260Z digest=sha256:f2a628e5928c342b384800981c50888a8465721d93895f3f31ee77947f994aab

Pith citing papers

No inbound Pith citation observations are available.