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arxiv: 2605.03187 · v1 · submitted 2026-05-04 · 🪐 quant-ph · cond-mat.mes-hall

Recognition: 3 theorem links

· Lean Theorem

Operating a bistable qubit

Fabrizio Berritta , Jan A. Krzywda , Tom Dvir , Paul Buttles , Stanislav Eilhart , Jeroen Danon , Ferdinand Kuemmeth
Authors on Pith no claims yet

Pith reviewed 2026-05-08 17:55 UTC · model grok-4.3

classification 🪐 quant-ph cond-mat.mes-hall
keywords bistable qubittwo-level systemsTLS defects1-bit feedbacksuperconducting qubitdephasing mitigationFPGA controlgate fidelity
0
0 comments X

The pith

A 1-bit feedback protocol estimates a superconducting qubit's bistable frequency from one single-shot measurement, reaching the qubit's intrinsic entropy limit.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper shows how parasitic two-level system defects make a qubit's frequency jump between two stable values, causing dephasing that limits gate performance. The authors introduce a simple adaptive protocol that uses an FPGA controller to read the current frequency state from a single projective measurement and immediately retunes the drive. This approach extracts the maximum possible information allowed by the qubit's entropy and is tested on a real superconducting device. It removes the characteristic Ramsey beating pattern and keeps gate error rates low over long times.

Core claim

We experimentally demonstrate an adaptive protocol for operating a bistable qubit with high fidelity using a classical controller powered by a field-programmable gate array (FPGA). Our 1-bit feedback protocol estimates the qubit's bistable frequency from only one single-shot measurement, reaching the information limit set by the qubit's intrinsic entropy. We validate the protocol in a superconducting qubit by suppressing TLS-induced Ramsey beating, and deploy it to stabilize gate fidelities over time with approximately 136 kHz estimation bandwidth and a 77% error reduction.

What carries the argument

The 1-bit feedback protocol, which infers the current TLS state (and thus the qubit frequency) from a single projective measurement and updates the drive frequency in real time.

If this is right

  • TLS-induced Ramsey beating is suppressed in the qubit's coherence measurements.
  • Gate fidelities remain stable over extended operation periods.
  • Estimation bandwidth reaches approximately 136 kHz.
  • Gate error rates are reduced by 77% compared with the uncontrolled case.
  • The method supplies a practical route to mitigate dephasing from strongly coupled TLS defects.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same single-shot inference idea could be applied to other discrete noise sources that produce telegraph-like frequency jumps in quantum devices.
  • Scaling the protocol to arrays with several independent TLS per qubit would require only modest additional classical logic.
  • The bandwidth and error-reduction numbers set a concrete target for controller hardware in future large-scale processors.

Load-bearing premise

The bistability is produced by one strongly coupled TLS whose state can be correctly read out from a single measurement and whose switching is slower than the controller's update speed.

What would settle it

Running the protocol on a device where the TLS switching rate exceeds the FPGA update time or where multiple TLS contribute comparable frequency shifts, and observing that Ramsey beating is not suppressed or that the 77% error reduction disappears.

Figures

Figures reproduced from arXiv: 2605.03187 by Fabrizio Berritta, Ferdinand Kuemmeth, Jan A. Krzywda, Jeroen Danon, Paul Buttles, Stanislav Eilhart, Tom Dvir.

Figure 1
Figure 1. Figure 1: FIG. 1. Dephasing and control infidelity of a bistable qubit. (a) Illus view at source ↗
Figure 2
Figure 2. Figure 2: FIG. 2. Mitigating dephasing of a bistable qubit by a feedback view at source ↗
Figure 3
Figure 3. Figure 3: FIG. 3. Quantifying improvement of gate fidelities by randomized view at source ↗
read the original abstract

Parasitic two-level-system (TLS) defects limit the stability and performance of solid-state quantum processors. Their interaction with a qubit can cause discrete, stochastic shifts of the qubit frequency, making the qubit bistable. We experimentally demonstrate an adaptive protocol for operating a bistable qubit with high fidelity using a classical controller powered by a field-programmable gate array (FPGA). Our "1-bit feedback" protocol estimates the qubit's bistable frequency from only one single-shot measurement, reaching the information limit set by the qubit's intrinsic entropy. We validate the protocol in a superconducting qubit by suppressing TLS-induced Ramsey beating, and deploy it to stabilize gate fidelities over time with approximately 136 kHz estimation bandwidth and a 77% error reduction. Our approach provides a simple, yet fundamentally efficient strategy for mitigating dephasing errors induced by strongly coupled TLS defects, and may enable the operation of large future qubit arrays suffering from few remaining, discrete instabilities.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 1 minor

Summary. The manuscript experimentally demonstrates a '1-bit feedback' protocol for operating a superconducting qubit made bistable by interaction with a strongly coupled TLS defect. Using an FPGA-based classical controller, a single projective measurement infers the TLS state to estimate and correct the qubit frequency in real time, claimed to reach the information limit set by the qubit's intrinsic entropy. Validation includes suppression of TLS-induced Ramsey beating and stabilization of gate fidelities with ~136 kHz bandwidth and 77% error reduction.

Significance. If the central claims hold, the work provides a simple, low-overhead method for mitigating discrete dephasing from TLS defects that is information-theoretically efficient. This could be impactful for scaling solid-state quantum processors by handling remaining instabilities without complex multi-shot protocols. The experimental results in a superconducting platform add practical relevance, and the high estimation bandwidth is a notable strength.

major comments (2)
  1. [Abstract] Abstract and experimental results: The central claim that the protocol reaches the qubit's intrinsic entropy limit via one single-shot measurement requires that the projective readout reliably infers the TLS state (near-unit fidelity) and that feedback latency is shorter than the TLS switching time. The manuscript reports suppression of Ramsey beating and 77% error reduction but provides no per-shot inference error rate, readout fidelity, or measured TLS switching time versus loop latency, leaving the information-limit assertion unverified.
  2. [Experimental results] Experimental validation section: The reported outcomes (Ramsey beating suppressed, 77% error reduction, 136 kHz bandwidth) lack raw data, error bars, or statistical details on the number of trials and variability, as noted in the abstract's presentation of clear experimental outcomes without supporting quantification. This undermines assessment of the quantitative improvements.
minor comments (1)
  1. [Abstract] The abstract uses 'bistable frequency' without a brief inline definition or reference to the underlying TLS-qubit coupling model for readers unfamiliar with the context.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for their positive evaluation of the work's significance and for the constructive comments on verification and quantification. We address each major point below and have revised the manuscript accordingly.

read point-by-point responses

  1. Referee: [Abstract] Abstract and experimental results: The central claim that the protocol reaches the qubit's intrinsic entropy limit via one single-shot measurement requires that the projective readout reliably infers the TLS state (near-unit fidelity) and that feedback latency is shorter than the TLS switching time. The manuscript reports suppression of Ramsey beating and 77% error reduction but provides no per-shot inference error rate, readout fidelity, or measured TLS switching time versus loop latency, leaving the information-limit assertion unverified.

    Authors: We agree that explicit per-shot metrics would strengthen the information-limit claim. The manuscript's design uses a single projective measurement whose outcome directly selects the estimated frequency; the observed suppression of Ramsey beating to the intrinsic coherence limit and the 77% gate-error reduction are consistent with high inference fidelity. In the revised manuscript we add the calibrated single-shot readout fidelity (extracted from the measurement contrast), the independently measured TLS switching time, and the FPGA loop latency (well below the switching time), allowing direct comparison to the entropy bound. revision: yes

  2. Referee: [Experimental results] Experimental validation section: The reported outcomes (Ramsey beating suppressed, 77% error reduction, 136 kHz bandwidth) lack raw data, error bars, or statistical details on the number of trials and variability, as noted in the abstract's presentation of clear experimental outcomes without supporting quantification. This undermines assessment of the quantitative improvements.

    Authors: We acknowledge that the original presentation omitted error bars and trial counts. The revised manuscript now includes error bars on all quantitative plots, states the number of experimental repetitions for each dataset (e.g., Ramsey traces and fidelity measurements), and reports the standard deviation across repeated runs. Raw time traces and histograms are added to the supplementary material. revision: yes

Circularity Check

0 steps flagged

No circularity: experimental protocol validated directly against measured performance

full rationale

The paper describes an FPGA-based 1-bit feedback protocol for a superconducting qubit experiencing TLS-induced bistability. The core claim that the protocol reaches the information limit set by the qubit's intrinsic entropy is presented as a design goal justified by the single-shot projective measurement providing one bit, with experimental validation through observed suppression of Ramsey beating and 77% gate-error reduction at 136 kHz bandwidth. No equations reduce a fitted parameter to a renamed prediction, no self-citation chain supports a uniqueness theorem, and the protocol steps are stated explicitly without self-definition. The work is self-contained as an experimental demonstration; the information-theoretic bound is invoked as an external limit rather than derived from the paper's own data fits.

Axiom & Free-Parameter Ledger

0 free parameters · 2 axioms · 0 invented entities

The protocol rests on the domain assumption that TLS defects produce discrete, long-lived frequency jumps that can be treated as a classical two-state Markov process observable in a single projective measurement.

axioms (2)
  • domain assumption TLS defects cause discrete stochastic shifts of the qubit frequency making the qubit bistable
    Stated directly in the abstract as the source of instability.
  • domain assumption A single projective measurement extracts enough information to estimate the current TLS state at the information limit set by qubit entropy
    Central to the 1-bit feedback claim.

pith-pipeline@v0.9.0 · 5478 in / 1301 out tokens · 58468 ms · 2026-05-08T17:55:51.207580+00:00 · methodology

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Reference graph

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