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arxiv: 2605.16798 · v1 · pith:UKB6FRUVnew · submitted 2026-05-16 · 💻 cs.CR · cs.SE

Stop Starving or Stuffing Me: Boosting Firmware Fuzzing Efficiency with On-demand Input Delivery

Pith reviewed 2026-05-19 21:11 UTC · model grok-4.3

classification 💻 cs.CR cs.SE
keywords firmware fuzzinginput deliverystatic analysisdynamic analysiscode coveragebug detectionon-demand input
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0 comments X

The pith

Firmware fuzzers gain coverage by delivering inputs precisely at availability check points recovered via static and dynamic analysis.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

Firmware often receives inputs asynchronously and independently of its execution, unlike general software. Existing fuzzers deliver inputs in ad-hoc ways that either overwhelm the firmware with too much data or fail to supply enough at the right moments. The paper shows that static and dynamic analysis can recover each input processing route as three stages: retrieval, availability check, and processing. This mapping lets the fuzzer deliver test cases exactly at the availability checks and in suitable quantities. The resulting system, FIDO, acts as an add-on that raises code coverage and speeds bug finding over prior methods.

Core claim

Firmware input processing routes can be mapped into three stages: input retrieval, availability check, and processing. Delivering fuzzer inputs exactly at the availability check points within the expected length range, combined with optimized scheduling for multiple routes, allows the fuzzer to avoid overwhelming or under-supplying the firmware, resulting in higher code coverage and faster discovery of bugs.

What carries the argument

Three-stage input processing route mapping recovered by static and dynamic analysis, which identifies availability check points to enable on-demand input delivery at the right timing and quantity.

If this is right

  • FIDO raises median code coverage by up to 115% over Fuzzware's ad-hoc input delivery.
  • FIDO raises median code coverage by up to 54% over MULTIFUZZ.
  • FIDO raises coverage by up to 19% over SEmu even though SEmu requires manual point specification.
  • FIDO finds known bugs faster and uncovers previously unknown bugs.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same stage-mapping technique could extend to fuzzing other embedded or real-time systems that process inputs asynchronously.
  • Combining the recovered availability checks with runtime monitoring might further reduce cases where inputs are still missed.
  • The approach could lower the manual effort needed to fuzz complex firmware that currently requires human-specified delivery points.

Load-bearing premise

The static and dynamic analysis can reliably recover the three-stage input processing routes across diverse firmware without missing asynchronous behaviors or needing extensive manual tuning.

What would settle it

Running FIDO on firmware where availability checks occur through indirect or runtime-generated code that the analysis fails to recover, producing no measurable coverage gain over ad-hoc delivery.

Figures

Figures reproduced from arXiv: 2605.16798 by Chung Hwan Kim, Keming Zhao, Le Guan, Peng Liu, Shandian Shen, Wei Zhou.

Figure 1
Figure 1. Figure 1: Three delivery plans with varying timing and [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Two I/O operating modes for peripheral input [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 4
Figure 4. Figure 4: Overview of FIDO 1) As noted in F3, P operations occur only when length checks (i.e., lower limits) are satisfied; 2) As noted in F1, the ISR uses a ring buffer for input storage, meaning the input is overwritten before retrieval, indicating the input byte length has exceeded the upper limits. Thus, we propose incrementally increasing the delivery bytes at the delivery point and monitoring the length at wh… view at source ↗
Figure 5
Figure 5. Figure 5: Length range inference with example in Listing 1. [PITH_FULL_IMAGE:figures/full_fig_p008_5.png] view at source ↗
Figure 7
Figure 7. Figure 7: Code coverage comparison between SEmu+MSP and SEmu+FIDO (only 7 samples are shown, as the other samples require peripheral models that SEmu does not ex￾tract). fuzz delivery strategies, each byte is delivered after certain number of basic blocks are executed, allowing enough time for inputs to be read, so the overfeeding problem P1 is less common, except for input routes containing stricter length checks l… view at source ↗
Figure 8
Figure 8. Figure 8: Code Coverage Comparison with and without [PITH_FULL_IMAGE:figures/full_fig_p018_8.png] view at source ↗
read the original abstract

Firmware fuzzing has gained attention for identifying firmware bugs. However, current approaches often directly integrate fuzzing tools for general software. General software receives input as it encounters I/O functions, but firmware input can be received asynchronously and independently of the firmware's execution, with uncertain timing and quantity. Without full awareness of firmware's exceptions, existing solutions often imprudently deliver fuzzer-generated input to the firmware in an ad-hoc way. This either overwhelms the processing function of the firmware (stuffing) or fails to deliver enough input data to trigger input processing functions (starving). In both cases, fuzzing capability is weakened. In this paper, we comprehensively investigate the input delivery issue. To determine the optimal timing and quantity for delivering test cases, we leverage the fact that firmware has to check input availability before using data. So we employ static and dynamic analysis to map each input processing route into three stages: input retrieval, availability check, and processing. This recovered semantic information allows the fuzzer to accurately deliver input at the availability check points within the expected length range. For multiple input routes problem, we also optimize the scheduling algorithm to reach more diverse routes. Our prototype, named FIDO, can serve as an add-on to existing firmware fuzzers to enhance their test-case delivery effectiveness. Compared to ad-hoc input delivery methods used in Fuzzware and MULTIFUZZ, FIDO increases their median code coverage by up to 115% and 54%, respectively. Compared to SEmu, which requires humans to manually specify input delivery points, FIDO still improves its coverage by up to 19%. As a result, FIDO discovers known bugs significantly faster and also identifies five previously unknown bugs.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

3 major / 2 minor

Summary. The paper presents FIDO, an add-on for firmware fuzzers that employs static and dynamic analysis to recover input processing routes and decompose them into three stages (retrieval, availability check, and processing). This semantic mapping enables precise on-demand delivery of fuzzer inputs at availability-check points with appropriate lengths, avoiding the starving or stuffing problems that arise from ad-hoc delivery in asynchronous firmware settings. The prototype is shown to improve median code coverage by up to 115% over Fuzzware, 54% over MULTIFUZZ, and 19% over manual-point SEmu, while also accelerating discovery of known bugs and finding five new ones.

Significance. If the route-recovery analysis proves reliable across firmware with varied input mechanisms, FIDO would meaningfully advance practical firmware fuzzing by directly tackling a core source of inefficiency in input scheduling. The reported coverage deltas and new bug findings provide concrete evidence of impact; the approach is additive to existing tools rather than a full replacement, which increases its potential adoption.

major comments (3)
  1. [§3] §3 (Static and Dynamic Analysis for Route Mapping): The description of how availability checks are identified does not explicitly address asynchronous or indirect mechanisms such as interrupt handlers, DMA completion callbacks, or hardware queues. Because the coverage gains (up to 115%/54%/19%) rest on correctly locating these checks for on-demand delivery, incomplete recovery could produce spurious or missed routes and undermine the comparison to ad-hoc baselines.
  2. [Evaluation] Evaluation section (coverage results): The improvements are stated as 'median code coverage by up to' values; it is unclear whether these are the maximum observed median across firmware samples, whether runs were repeated with statistical tests, or how data-exclusion rules for non-input routes were applied. Without these details the robustness of the central claim cannot be fully assessed.
  3. [§4] §4 (Multi-route Scheduling): The scheduler optimization for reaching diverse routes is presented at a high level. A concrete description or pseudocode of how the algorithm balances delivery across routes with different availability frequencies would be needed to verify that it does not simply re-introduce starvation for low-frequency routes.
minor comments (2)
  1. [Abstract] Abstract: the phrase 'imprudently deliver' is informal; a more precise term such as 'deliver without regard to availability timing' would improve clarity.
  2. The paper would benefit from an explicit limitations paragraph discussing firmware that uses polling loops or complex state machines for input availability.

Simulated Author's Rebuttal

3 responses · 0 unresolved

We thank the referee for the constructive feedback and the recommendation for major revision. We address each major comment point by point below, providing clarifications and committing to revisions where the manuscript can be strengthened without misrepresenting our approach or results.

read point-by-point responses
  1. Referee: [§3] §3 (Static and Dynamic Analysis for Route Mapping): The description of how availability checks are identified does not explicitly address asynchronous or indirect mechanisms such as interrupt handlers, DMA completion callbacks, or hardware queues. Because the coverage gains (up to 115%/54%/19%) rest on correctly locating these checks for on-demand delivery, incomplete recovery could produce spurious or missed routes and undermine the comparison to ad-hoc baselines.

    Authors: Our route-mapping technique combines static identification of input retrieval sites with dynamic tracing that monitors all executed control flows and data accesses in the emulator. This inherently includes paths triggered by interrupts, DMA completions, and hardware queues because availability checks (e.g., status register tests or buffer-length comparisons) are observed at runtime regardless of the triggering mechanism. Nevertheless, we agree that the current text does not spell out these cases explicitly. We will revise §3 to add a paragraph that describes how interrupt handlers and DMA callbacks are captured through dynamic tracing of hardware register accesses and callback sites, thereby clarifying the generality of the recovery process. revision: yes

  2. Referee: [Evaluation] Evaluation section (coverage results): The improvements are stated as 'median code coverage by up to' values; it is unclear whether these are the maximum observed median across firmware samples, whether runs were repeated with statistical tests, or how data-exclusion rules for non-input routes were applied. Without these details the robustness of the central claim cannot be fully assessed.

    Authors: The phrase 'up to' denotes the largest median coverage gain observed across the evaluated firmware samples. Each campaign was repeated multiple times with distinct random seeds, medians were taken over those runs, and non-input routes were filtered using the same route-mapping analysis that identifies retrieval and availability-check stages. We will expand the Evaluation section to state the exact number of repetitions, the statistical test employed (Wilcoxon rank-sum), and the precise exclusion criteria, thereby making the experimental protocol fully reproducible. revision: yes

  3. Referee: [§4] §4 (Multi-route Scheduling): The scheduler optimization for reaching diverse routes is presented at a high level. A concrete description or pseudocode of how the algorithm balances delivery across routes with different availability frequencies would be needed to verify that it does not simply re-introduce starvation for low-frequency routes.

    Authors: The scheduler maintains a priority queue in which each route's priority is inversely proportional to its measured availability frequency; low-frequency routes therefore receive proportionally more delivery opportunities. A weighted round-robin pass then selects the next route while respecting these priorities. We will insert pseudocode in §4 that shows the priority-update and selection steps, demonstrating that starvation of infrequent routes is explicitly avoided. revision: yes

Circularity Check

0 steps flagged

No circularity: empirical engineering technique with independent evaluation

full rationale

The paper describes a static/dynamic analysis pipeline to recover three-stage input routes (retrieval, availability check, processing) from firmware binaries and then schedules on-demand delivery at check points. No equations, fitted parameters, or self-referential definitions appear; the coverage gains are measured empirically against external baselines (Fuzzware, MULTIFUZZ, SEmu) on standard firmware images. The method is self-contained against external benchmarks and does not reduce any central claim to a prior self-citation or by-construction equivalence.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

The approach assumes firmware input handling always includes an explicit availability check that can be located by static/dynamic analysis. No free parameters or invented entities are mentioned; the method adds an analysis layer on top of existing fuzzers.

axioms (1)
  • domain assumption Firmware must check input availability before using data, and this check is statically or dynamically identifiable.
    Stated in the abstract as the key fact leveraged to map routes into retrieval, availability check, and processing stages.

pith-pipeline@v0.9.0 · 5863 in / 1316 out tokens · 25743 ms · 2026-05-19T21:11:49.002470+00:00 · methodology

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