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arxiv: 2606.07848 · v1 · pith:B7N53VGUnew · submitted 2026-06-05 · ❄️ cond-mat.supr-con · cond-mat.mtrl-sci

Phase Formation and Thermal Stability of Superconducting Platinum Silicide Thin Films on Silicon

Tharanga R. Nanayakkara , Ananya Chattaraj , Mingzhao Liu , Charles T. Black This is my paper

Pith reviewed 2026-06-27 20:05 UTC · model grok-4.3

classification ❄️ cond-mat.supr-con cond-mat.mtrl-sci
keywords PtSiplatinum silicidesuperconducting thin filmsrapid thermal annealingphase formationsilicon devicesthermal stabilityX-ray reflectivity
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The pith

Phase-pure PtSi thin films form on silicon within minutes at 600 °C by rapid thermal processing and remain stable under extended annealing.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper maps how annealing temperature and duration control the formation of platinum silicide films intended for silicon-based superconducting quantum devices. It shows that phase-pure PtSi appears quickly at 600 °C and that 30-second anneals anywhere from 300 to 600 °C produce films with matching microstructure and superconducting transition temperatures near 1 K. X-ray reflectivity data indicate that interface roughening arises directly from the Pt2Si-to-PtSi conversion step itself. The results define a practical, CMOS-compatible processing window for these films.

Core claim

Phase-pure PtSi forms within minutes by rapid thermal processing at 600 °C and is stable under extended annealing, while 30 s anneals across 300-600 °C yield equivalent film quality with consistent microstructure and superconducting properties. X-ray reflectivity reveals that interfacial roughening is an intrinsic consequence of the Pt2Si-to-PtSi conversion step rather than a result of elevated temperature or prolonged annealing.

What carries the argument

The Pt2Si-to-PtSi phase conversion during rapid thermal annealing on silicon.

Load-bearing premise

Properties measured on test films by diffraction, reflectivity, and transport will translate directly to functional performance in full silicon-based superconducting quantum device stacks.

What would settle it

Observation of degraded superconducting transition temperature, excess interface scattering, or new defects in actual quantum device structures made with the reported PtSi process.

Figures

Figures reproduced from arXiv: 2606.07848 by Ananya Chattaraj, Charles T. Black, Mingzhao Liu, Tharanga R. Nanayakkara.

Figure 2
Figure 2. Figure 2: FIG. 2. Electrical resistance of PtSi films annealed at 600 [PITH_FULL_IMAGE:figures/full_fig_p002_2.png] view at source ↗
Figure 4
Figure 4. Figure 4: FIG. 4. Normalized PtSi (020) GIXRD diffraction peak for [PITH_FULL_IMAGE:figures/full_fig_p003_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: FIG. 5. Resistance versus temperature from 300 K to 500 mK [PITH_FULL_IMAGE:figures/full_fig_p003_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: FIG. 6. X-ray diffraction [PITH_FULL_IMAGE:figures/full_fig_p004_6.png] view at source ↗
Figure 7
Figure 7. Figure 7: FIG. 7. XRR measurements of Pt/Si films annealed for 30 [PITH_FULL_IMAGE:figures/full_fig_p005_7.png] view at source ↗
Figure 8
Figure 8. Figure 8: FIG. 8. (a) XRD [PITH_FULL_IMAGE:figures/full_fig_p005_8.png] view at source ↗
read the original abstract

Platinum silicide (PtSi) thin films are promising for silicon-based superconducting quantum devices due to their compatibility with CMOS fabrication, air stability, and superconducting transition temperature near 1 K. We report a systematic study of PtSi phase formation, microstructure, and interface quality as a function of annealing temperature and duration, characterizing films using grazing-incidence X-ray diffraction, X-ray reflectivity, and electrical transport measurements. Phase-pure PtSi forms within minutes by rapid thermal processing at 600 {\deg}C and is stable under extended annealing, while 30 s anneals across 300-600 {\deg}C yield equivalent film quality with consistent microstructure and superconducting properties. X-ray reflectivity reveals that interfacial roughening is an intrinsic consequence of the Pt2Si-to-PtSi conversion step rather than a result of elevated temperature or prolonged annealing. These results establish a robust processing window for PtSi formation in silicon-based superconducting device fabrication flows.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The manuscript presents an experimental study of platinum silicide thin-film formation on silicon using rapid thermal processing. It claims that phase-pure PtSi forms within minutes at 600 °C, remains stable under extended annealing, and that 30 s anneals between 300–600 °C produce equivalent film quality, microstructure, and superconducting properties as measured by GIXRD, XRR, and electrical transport. The work further asserts that interfacial roughening observed by XRR is an intrinsic consequence of the Pt2Si-to-PtSi conversion step rather than a function of temperature or time, and concludes that these results establish a robust processing window for PtSi in silicon-based superconducting quantum device fabrication flows.

Significance. If the reported processing conditions and intrinsic-roughening conclusion hold, the results would supply concrete, CMOS-compatible guidelines for forming superconducting PtSi films with consistent Tc near 1 K, which could accelerate integration of silicide-based elements into silicon quantum circuits.

major comments (2)
  1. [Abstract, §4] Abstract and §4 (Conclusions): the central claim that the reported RTP conditions 'establish a robust processing window for PtSi formation in silicon-based superconducting device fabrication flows' extrapolates beyond the data. All GIXRD, XRR, and transport results are obtained on blanket Pt/Si test structures; no measurements on patterned devices, Josephson junctions, resonators, or multilayer stacks containing dielectrics or gates are presented. This gap directly undermines the device-fabrication claim.
  2. [§3.3] §3.3 (XRR analysis): the assertion that interfacial roughening is 'intrinsic' to the Pt2Si → PtSi conversion is supported only by comparing a limited set of blanket-film samples. Without quantitative error bars on the extracted roughness values or a control series that isolates conversion from other process variables, the 'intrinsic' interpretation remains under-constrained.
minor comments (2)
  1. [Abstract] The abstract states conclusions from GIXRD, XRR, and transport but contains no numerical values, error bars, or sample statistics; these should be added or the abstract shortened to avoid overstatement.
  2. [Figures] Figure captions and axis labels should explicitly state the number of samples measured and the fitting model used for XRR roughness extraction.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive feedback. We agree that the original manuscript overstated the direct applicability to full device fabrication flows and that the 'intrinsic' interpretation of interfacial roughening would benefit from additional quantification. We have revised the abstract, §4, and §3.3 accordingly while preserving the core experimental findings on blanket films.

read point-by-point responses

  1. Referee: [Abstract, §4] Abstract and §4 (Conclusions): the central claim that the reported RTP conditions 'establish a robust processing window for PtSi formation in silicon-based superconducting device fabrication flows' extrapolates beyond the data. All GIXRD, XRR, and transport results are obtained on blanket Pt/Si test structures; no measurements on patterned devices, Josephson junctions, resonators, or multilayer stacks containing dielectrics or gates are presented. This gap directly undermines the device-fabrication claim.

    Authors: We agree that the original wording in the abstract and conclusions extrapolates beyond the presented data, which are limited to blanket Pt/Si test structures. We have revised the abstract and §4 to state that the results establish a robust processing window for phase-pure PtSi formation on silicon substrates, providing a foundation for potential integration into silicon-based superconducting device flows. We have added explicit language noting that direct validation on patterned devices and multilayer stacks remains future work. revision: yes

  2. Referee: [§3.3] §3.3 (XRR analysis): the assertion that interfacial roughening is 'intrinsic' to the Pt2Si → PtSi conversion is supported only by comparing a limited set of blanket-film samples. Without quantitative error bars on the extracted roughness values or a control series that isolates conversion from other process variables, the 'intrinsic' interpretation remains under-constrained.

    Authors: We acknowledge that the original presentation lacked quantitative error bars and a fully isolating control series. The XRR trends show roughening coinciding specifically with the Pt2Si-to-PtSi conversion across multiple temperatures and times. In the revision we have added error bars to all extracted roughness values, expanded the discussion of the control experiments performed, and softened the wording from 'intrinsic' to 'consistent with an intrinsic consequence of the phase conversion step' while retaining the supporting data. revision: partial

Circularity Check

0 steps flagged

No circularity; purely experimental observations with no derivations or self-referential fits

full rationale

The paper reports direct experimental results from GIXRD phase identification, XRR roughness measurements, and transport Tc on Pt/Si blanket films under varying RTP conditions. No equations, derivations, fitted parameters, or mathematical predictions appear in the text. Claims about phase purity, stability, and intrinsic roughening are interpretations of measured data rather than reductions to inputs by construction. No self-citation chains or ansatzes are invoked to justify any derivation. The extrapolation concern raised by the skeptic is a question of external validity for device integration, not circularity in the reported chain.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Experimental thin-film study with no mathematical model, free parameters, axioms, or invented entities described in the abstract.

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Reference graph

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