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REVIEW 2 major objections

Product coding converts any bit-level capacity-achieving code family into a block-level capacity-achieving family at the same asymptotic rate.

Reviewed by Pith at T0; open to challenge. T0 means a machine referee read the full paper against a public rubric. the ladder, T0–T4 →

T0 review · grok-4.5

2026-07-08 19:46 UTC pith:G32FT6EX

load-bearing objection Clean modular upgrade from bit-error to block-error capacity via product codes; RM–BCH application is solid, general theorem needs a uniformity fix. the 2 major comments →

arxiv 2607.05816 v2 pith:G32FT6EX submitted 2026-07-07 cs.IT math.IT

From Bit to Block: Capacity Achievement via Code Concatenation

classification cs.IT math.IT MSC 94A2494B0594B35
keywords product codeschannel capacityblock-error probabilitybit-error probabilityReed-Muller codesBCH codesbinary memoryless symmetric channelsbounded-distance decoding
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

This paper shows that product coding can turn codes that only guarantee vanishing bit-error probability into codes that guarantee vanishing block-error probability, without losing asymptotic rate. The encoder places a row code of the target rate against a high-rate column code with a fixed correction radius. Decoding first runs the rows, purifying the channel output into a sparse residual error pattern, then runs the columns to clean those residuals. The proof is that if the column radius exceeds the residual bit-error rate and columns are long enough for a binomial large-deviation bound to beat a union bound over columns, the product code fails with vanishing probability. As an application, Reed–Muller row codes product-coded with BCH column codes achieve the capacity of any fixed binary memoryless symmetric channel at the block level.

Core claim

A bit-level capacity-achieving family can be converted, by product coding with a high-rate bounded-distance column code, into a block-level capacity-achieving family at the same asymptotic rate. When the column correction radius exceeds the residual bit-error probability after row decoding and column length is large enough for a binomial large-deviation bound to overcome the union bound over columns, the product code has vanishing block-error probability. In particular, an RM–BCH product-code family achieves the capacity of any fixed BMS channel.

What carries the argument

The product-code construction with sequential decoding: capacity-achieving row codes first purify the channel into a residual error pattern of density equal to the residual bit-error rate, after which high-rate column codes of fixed relative correction radius clean the residuals. The load-bearing step is a binomial large-deviation bound on residual column weight that is made strong enough to dominate a union bound over all columns while the column rate still tends to one.

Load-bearing premise

Residual errors after row decoding must behave enough like independent Bernoulli trials at the residual bit-error rate for a binomial large-deviation bound to apply column by column, and columns must be long enough for that bound to beat the union bound while the column rate still tends to one.

What would settle it

Exhibit a fixed BMS channel and a sequence of product codes meeting the paper's radius and length conditions for which block-error probability stays bounded away from zero, or show that residual column weights after row decoding fail the claimed binomial large-deviation estimate at the residual bit-error rate.

Watch this falsifier — get emailed when new claim-graph text bears on it.

If this is right

  • Any family of codes with vanishing bit-error probability at rates approaching capacity can be lifted to a product-code family with vanishing block-error probability at the same rates.
  • Reed–Muller codes, already known to achieve BMS capacity at the bit level, yield block-level capacity-achieving codes when product-coded with suitable BCH column codes.
  • Asymptotic rate is preserved because the column-code rate can be driven to one while still meeting the correction-radius and length conditions.
  • The same conversion applies on any fixed binary memoryless symmetric channel.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same product-lift template may apply to other bit-level capacity-achieving constructions, such as polar codes under successive cancellation, provided residual errors after row decoding stay sparse enough for the large-deviation argument.
  • If residual errors after row decoding show only mild dependence rather than pure independence, a concentration inequality stronger than the plain binomial bound might still close the argument and relax the column-length requirement.
  • The construction offers a general pattern for upgrading bit-error guarantees to block-error guarantees whenever one already has good short codes with bounded-distance decoding.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit.

Referee Report

2 major / 0 minor

Summary. The paper claims that product coding converts a bit-level capacity-achieving family into a block-level capacity-achieving family at the same asymptotic rate: rows are decoded first to produce a sparse residual error pattern, then columns are cleaned by bounded-distance decoding. Under the stated conditions that the column correction radius exceeds the residual bit-error probability and that column length is large enough for a binomial large-deviation bound to dominate a union bound over columns, the product code has vanishing block-error probability. As an application, an RM–BCH product family is asserted to achieve the capacity of any fixed BMS channel.

Significance. If correct, the result would give a clean, modular reduction from bit-level to block-level capacity achievement via classical product codes, and would yield an explicit RM–BCH construction for BMS capacity. The argument is standard in outline (row purification + column BD + LD vs union bound) and builds on known RM capacity theorems without circular fitting. The main technical value is the conversion lemma itself and the rate-preserving parameter choices for BCH columns.

major comments (2)
  1. The general conversion (abstract and the natural proof structure feeding a single residual p into a column-wise binomial LD bound, then a union over columns) treats residual errors as i.i.d. Bernoulli(p) or as stochastically dominated by Bin(m,p). Vanishing average BER (1/n)∑P(E_j)→0 does not imply max_j P(E_j)≤τ. A vanishing fraction of positions may retain P(E_j) bounded away from 0; those columns then fail with probability not tending to 0, so BLER need not vanish. Row-to-row independence follows from independent channel uses, but identical Bernoullis (or uniform domination) require per-position control or code symmetry. The abstract’s stated conditions omit an explicit max-BER or transitivity hypothesis. RM–BCH is protected by affine invariance of RM (all positions equivalent), but the general claim needs this hypothesis stated and used.
  2. Even granting a uniform residual rate p_n→0, the manuscript must verify that column length n_c can be chosen so that the binomial LD bound beats the union bound over n_r columns while the BCH rate loss t log n_c / n_c →0 (so overall rate still →C). This is standard once uniform p_n is granted, but the parameter regime (how fast p_n→0 vs how large n_c must be) is load-bearing for the “same asymptotic rate” claim and should be written with explicit rates, not only existence.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for a careful and constructive report. The two major comments correctly identify places where the general conversion argument, as written, is incomplete or insufficiently quantitative. We agree with both points and will revise the manuscript accordingly: (i) the conversion lemma and abstract will state an explicit uniform residual-BER (or code-symmetry) hypothesis, and (ii) the parameter regime that keeps the BCH rate loss vanishing while the large-deviation bound dominates the column union bound will be written with explicit growth rates. The RM–BCH application is already protected by affine invariance; we will make that use of symmetry fully explicit. We believe these revisions address the referee’s concerns without altering the main claims.

read point-by-point responses
  1. Referee: The general conversion treats residual errors as i.i.d. Bernoulli(p) or stochastically dominated by Bin(m,p). Vanishing average BER does not imply max_j P(E_j) o0; a vanishing fraction of positions may retain P(E_j) bounded away from 0, so those columns fail with probability not tending to 0 and BLER need not vanish. Identical Bernoullis (or uniform domination) require per-position control or code symmetry. The abstract omits an explicit max-BER or transitivity hypothesis. RM–BCH is protected by affine invariance of RM, but the general claim needs this hypothesis stated and used.

    Authors: The referee is correct. Vanishing average bit-error rate alone does not yield a uniform residual probability that can be fed into a single binomial large-deviation bound for every column; without additional control, a vanishing fraction of “bad” positions can keep the block-error probability from vanishing. We will revise the general conversion statement (and the abstract) to require explicitly either (a) max_j P(E_j) o0, or (b) a symmetry/transitivity hypothesis on the row code that makes all positions equivalent, so that average BER automatically upgrades to uniform BER. The proof will invoke this hypothesis at the step that produces a common residual p_n for the column-wise binomial bound. For the RM–BCH application the needed symmetry is already present: the affine-invariance of Reed–Muller codes implies that every coordinate has identical error probability after row decoding. We will state this use of affine invariance explicitly so that the application is self-contained and does not rely on an unstated general claim. These changes make the hypotheses of the conversion lemma match what the argument actually uses. revision: yes

  2. Referee: Even granting a uniform residual rate p_n o0, the manuscript must verify that column length n_c can be chosen so that the binomial LD bound beats the union bound over n_r columns while the BCH rate loss t log n_c / n_c o0 (so overall rate still o C). This is standard once uniform p_n is granted, but the parameter regime (how fast p_n o0 vs how large n_c must be) is load-bearing for the “same asymptotic rate” claim and should be written with explicit rates, not only existence.

    Authors: We agree that an existence argument is insufficient for the rate-preserving claim; the relative growth of n_c, t and p_n must be exhibited. In the revision we will supply explicit sufficient conditions. Let the residual bit-error probability after row decoding satisfy p_n o0 uniformly. Choose the BCH designed distance so that the correction radius t_n satisfies t_n/n_c o0 yet t_n gtr p_n n_c (e.g., t_n = heta n_c with any fixed heta otin{0} larger than the eventual residual density, or a slowly vanishing heta_n). The binary entropy / large-deviation rate function D(·‖·) then yields a column failure probability at most exp(−n_c I) for some I>0 that depends only on the gap between p_n and t_n/n_c. Setting n_c gtr (log n_r)/I makes the union bound over the n_r columns vanish. Simultaneously the BCH rate loss is O((t_n log n_c)/n_c) o0 under the same choice. Concrete growth rates that work whenever p_n o0 (for instance n_c = (log n_r)^2 when p_n decays slower than any positive power, or n_c = n_r^ε for a small ε when p_n decays polynomially) will be written out, so that the product-code rate still tends to the row-code rate and therefore to capacity. This renders the “same asymptotic rate” statement fully quantitative. revision: yes

Circularity Check

0 steps flagged

No significant circularity: one-way reduction from external bit-level CA families to block-level product codes; self-citations are non-load-bearing.

full rationale

The paper's central claim is a conversion theorem: any bit-level capacity-achieving family (rate o C, bit-error probability o 0) can be turned into a block-level capacity-achieving product-code family by pairing it with a high-rate column code of sufficient correction radius and length. The argument is a standard probabilistic reduction (row decoding purifies to a sparse residual pattern; column-wise binomial large-deviation bounds plus a union bound over columns drive block error to zero while column rate o 1). It does not define its inputs in terms of its outputs, does not fit parameters to the target quantity and rename the fit a prediction, and does not import a uniqueness theorem that forbids alternatives. The RM–BCH application invokes known external results on RM codes achieving BMS capacity at the bit level (and standard BCH parameters); those citations supply independent support rather than a self-referential chain that forces the conclusion by construction. The reader's residual concern about average BER versus uniform per-position residual rates is a correctness/assumption gap, not circularity: the derivation still proceeds from stated hypotheses to the claimed vanishing BLER without reducing the claim to its own premises by definition. Score 1 reflects only the ordinary, non-load-bearing presence of author-related background citations typical of a theory paper; the derivation itself is self-contained against external benchmarks once the bit-level family is granted.

Axiom & Free-Parameter Ledger

0 free parameters · 4 axioms · 0 invented entities

Pure asymptotic coding-theory construction. No free fitted parameters and no new physical entities. The claim rests on the standard BMS channel model, existence of bit-level capacity-achieving row families (for the application: known RM theorems), existence of high-rate bounded-distance column codes (classical BCH), and standard binomial large-deviation bounds. All of these are imported from prior literature or standard math rather than invented here.

axioms (4)
  • domain assumption Binary memoryless symmetric (BMS) channel model with a well-defined Shannon capacity
    Capacity achievement is stated for any fixed BMS channel; this is the standard information-theoretic setting invoked throughout the abstract.
  • domain assumption Existence of bit-level capacity-achieving row-code families with vanishing bit-error probability at rates approaching capacity
    The conversion theorem takes such a family as an external input; the RM application rests on recent RM bit-level capacity theorems cited as background.
  • domain assumption Existence of high-rate column codes with positive relative bounded-distance correction radius (e.g., BCH)
    Column codes must have rate → 1 while retaining a fixed positive relative correction capability; classical algebraic coding supplies this.
  • standard math Binomial large-deviation / Chernoff-type concentration applies to residual column error counts after row decoding
    Used so that residual errors fall inside the column correction radius with probability high enough to beat a union bound over columns.

pith-pipeline@v0.9.1-grok · 6242 in / 2658 out tokens · 72738 ms · 2026-07-08T19:46:01.561035+00:00 · methodology

0 comments
read the original abstract

This paper shows that bit-level reliability can be converted into block-level reliability for binary codes over BMS channels through Forney's concatenation scheme. The construction concatenates an inner code of rate R-o(1) and vanishing bit-error probability \epsilon with an outer code of rate 1-o(1) equipped with a bounded-distance decoder. We show that, when the outer correction radius exceeds \epsilon and a suitable large-deviation condition holds, the concatenated code has rate R-o(1) and vanishing block-error probability. Hence, a family with vanishing bit-error probability for rates below capacity can be converted into a capacity-achieving concatenated-code family. We further show that, when binary BCH codes are used as outer codes, inner codes with bit-error probability \epsilon=o(1/\log\log n) can be converted into a capacity-achieving concatenated family.

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