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REVIEW 3 major objections 2 minor

Within binary CSS hypergraph-product codes, only the simplex-repetition family can implement every in-block logical CNOT by qubit permutation and Pauli-frame updates while keeping low-weight stabilizers.

Reviewed by Pith at T0; open to challenge. T0 means a machine referee read the full paper against a public rubric. the ladder, T0–T4 →

T0 review · grok-4.5

2026-07-15 02:05 UTC pith:QKXGNEKH

load-bearing objection Uniqueness of simplex-repetition HGP codes for phantom logical CNOTs is the real claim; overhead wins over surface codes remain hardware-contingent and uncheckable from the abstract alone. the 3 major comments →

arxiv 2607.12948 v1 pith:QKXGNEKH submitted 2026-07-14 quant-ph

Logical Entangling with Phantom Codes in Hypergraph Products

classification quant-ph
keywords phantom codeshypergraph product codeslogical CNOTqLDPC codessimplex-repetition codesneutral-atom arrayscircuit-level noisefault-tolerant quantum computation
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

Logical CNOT gates are a major source of physical spacetime cost in fault-tolerant quantum computing. Phantom codes try to remove that cost for every ordered in-block logical CNOT by replacing the gate with physical qubit permutations plus Pauli-frame updates. The open design question is whether this mechanism can live inside the low-weight stabilizer structure of quantum low-density parity-check codes. This paper answers the question inside the binary CSS hypergraph-product family: up to natural equivalences, the simplex-repetition family is the unique hypergraph-product family that satisfies the phantom condition. The same family is then simulated under circuit-level noise on two concrete tasks—logical GHZ preparation and Trotterized many-body simulation—where it keeps low-weight checks and shows concrete resource advantages over rotated surface-code baselines. Reconfigurable neutral-atom arrays are identified as a natural hardware match, because they already support nonlocal qLDPC connectivity and can realize the required permutations without extra physical entangling operations. The result therefore both classifies what is possible inside hypergraph products and supplies a concrete code family whose circuit-level gains can be measured today.

Core claim

Up to natural equivalences, the simplex-repetition family is the unique binary CSS hypergraph-product family that satisfies the phantom condition—i.e., that implements every ordered in-block logical CNOT solely by physical qubit permutations and Pauli-frame updates while retaining low-weight stabilizers. The same family delivers measurable spacetime savings versus rotated surface codes on logical GHZ preparation and Trotterized many-body simulation under circuit-level noise.

What carries the argument

The phantom condition: a formal requirement that every ordered in-block logical CNOT factors into a physical qubit permutation followed by a Pauli-frame update, together with the algebraic structure of binary CSS hypergraph-product codes that forces any code meeting the condition (up to natural equivalences) to be a simplex-repetition code.

Load-bearing premise

That physical qubit permutations plus Pauli-frame updates truly incur negligible residual error and spacetime cost relative to physical entangling gates on the intended hardware, so that satisfying the formal phantom condition actually yields a net overhead reduction.

What would settle it

Circuit-level noise simulations or hardware runs on reconfigurable neutral-atom arrays in which the measured spacetime cost (or residual logical error) of a phantom in-block CNOT exceeds that of a conventional transversal or lattice-surgery CNOT on an equal-distance rotated surface code for the same GHZ or Trotter circuit.

Watch this falsifier — get emailed when new claim-graph text bears on it.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit.

Referee Report

3 major / 2 minor

Summary. The manuscript claims that, within binary CSS hypergraph-product (HGP) codes and up to natural equivalences, the simplex-repetition family is the unique family satisfying a formal “phantom condition”: every ordered in-block logical CNOT is realized by physical qubit permutations and Pauli-frame updates while retaining low-weight stabilizers. It further claims that this family, evaluated under circuit-level noise on logical GHZ preparation and Trotterized many-body simulation, yields concrete spacetime advantages over rotated surface-code baselines, and that reconfigurable neutral-atom arrays are a natural hardware setting for the approach.

Significance. If the uniqueness theorem and the circuit-level comparisons hold as stated, the work would give a sharp design constraint inside the HGP framework and a concrete, low-weight qLDPC candidate for permutation-based logical entangling. That combination is of clear interest for low-overhead fault tolerance on reconfigurable platforms. The abstract also frames a falsifiable search program for other phantom qLDPC families with better asymptotics. These strengths cannot be confirmed from the abstract alone.

major comments (3)
  1. Only the abstract is available for review. The uniqueness theorem (statement, proof, and the precise definition of “natural equivalences”), the formal phantom condition, stabilizer-weight bounds, distance/rate tables, circuit-level noise model, and all numerical comparisons against rotated surface codes are invisible. Without those load-bearing ingredients the central claim cannot be checked for correctness or proportionality; a full-text review is required before any accept/reject decision.
  2. Abstract framing of the phantom mechanism and the neutral-atom claim: the overhead-reduction half of the strongest claim rests on the assertion that physical qubit permutations plus Pauli-frame updates realize every ordered in-block logical CNOT at negligible residual error and spacetime cost relative to a physical entangling gate. The abstract supplies no quantitative model of move times, atom-loss rates, residual decoherence, or connectivity constraints. If those costs are non-negligible under realistic control models, uniqueness may remain true while the claimed advantage over surface-code baselines disappears. This cost model must be stated and stress-tested in the full manuscript.
  3. Abstract claim of “concrete advantages” on GHZ preparation and Trotterized simulation: without distance/rate tables, error bars, exclusion rules, or the precise circuit-level noise hyperparameters, the numerical superiority over rotated surface codes cannot be assessed. The full text must report these quantities so that the advantage is reproducible and not an artifact of simulation choices.
minor comments (2)
  1. Abstract: “natural equivalences” should be named or briefly exemplified so that readers can judge whether other practically useful HGP families are excluded only by definition.
  2. Abstract: the phrase “without additional physical operations” for in-block logical CNOTs should be reconciled with the earlier mention of permutations and Pauli-frame updates, which are themselves physical or classical operations with some cost.

Circularity Check

0 steps flagged

No significant circularity; uniqueness is a mathematical classification inside HGP codes and benchmarks use external surface-code baselines.

full rationale

Only the abstract is available. It frames a uniqueness theorem: up to natural equivalences the simplex-repetition family is the unique binary CSS hypergraph-product family satisfying the phantom condition, then evaluates that family under circuit-level noise against rotated surface-code baselines on GHZ preparation and Trotterized simulation. Nothing in the abstract equates a claimed prediction to a fitted input by construction, defines the phantom condition in terms of the uniqueness result it is used to prove, or imports a uniqueness theorem solely via self-citation. The numerical comparisons are against external baselines. Residual risk of self-citation of prior phantom-code definitions cannot be verified or quoted from the abstract alone and is not load-bearing for the classification claim as stated. Per the hard rules, no circular step is asserted without a specific quote and reduction; the derivation chain as presented is self-contained.

Axiom & Free-Parameter Ledger

1 free parameters · 4 axioms · 1 invented entities

Abstract-only audit. Free parameters of the numerical study (noise rates, code sizes, Trotter steps, decoder choices) are not stated. Core domain axioms are the standard CSS/HGP stabilizer formalism and the authors’ definition of the phantom condition. No new physical particle or force is invented; ‘phantom codes’ and ‘simplex-repetition family’ are code-theoretic constructions whose independent evidence is the uniqueness proof and the (unseen) simulations.

free parameters (1)
  • circuit-level noise and simulation hyperparameters
    Abstract claims advantages under circuit-level noise but does not state physical error rates, code distances, number of Trotter steps, or decoder parameters; any such numbers used in the full paper are free parameters of the numerical claim.
axioms (4)
  • standard math Binary CSS hypergraph-product stabilizer formalism and standard qLDPC weight/distance notions
    Background algebraic coding theory assumed throughout the uniqueness argument.
  • domain assumption Definition of the phantom condition: every ordered in-block logical CNOT is realized by physical qubit permutations plus Pauli-frame updates
    The uniqueness theorem is relative to this condition; its precise formalization is load-bearing and not fully stated in the abstract.
  • ad hoc to paper ‘Natural equivalences’ under which uniqueness is claimed do not hide other practically useful HGP families
    The abstract qualifies uniqueness ‘up to natural equivalences’; if that equivalence is broad, the practical force of uniqueness weakens.
  • domain assumption Reconfigurable neutral-atom arrays can execute the required nonlocal qLDPC operations and permutations without material extra physical cost
    Hardware claim used to argue that the phantom mechanism is implementable in a realistic platform.
invented entities (1)
  • phantom condition (as a formal constraint on HGP codes) no independent evidence
    purpose: Defines which codes admit all ordered in-block logical CNOTs via permutations and Pauli-frame updates.
    Even if ‘phantom codes’ pre-exist, the abstract treats the phantom condition as the classifying property for HGP families; independent evidence is the uniqueness theorem itself, not an external measurement.

pith-pipeline@v1.1.0-grok45 · 6131 in / 2934 out tokens · 32899 ms · 2026-07-15T02:05:53.294170+00:00 · methodology

0 comments
read the original abstract

Logical entangling gates are a major source of physical spacetime overhead in fault-tolerant quantum computation. Phantom codes reduce this cost by implementing every ordered in-block logical CNOT through physical qubit permutations and Pauli-frame updates. Whether this mechanism can coexist with the low-weight stabilizer structure of qLDPC codes is a central question for low-overhead fault-tolerant architectures. We give a deterministic answer within binary CSS hypergraph product (HGP) codes. Up to natural equivalences, the simplex-repetition family is the unique HGP family satisfying the phantom condition. We then evaluate this family under circuit-level noise in logical GHZ-state preparation and Trotterized many-body quantum simulation. The codes retain low-weight stabilizer checks and yield concrete advantages over rotated surface-code baselines in both benchmarks. Reconfigurable neutral-atom arrays offer a natural setting for this approach, supporting nonlocal qLDPC operations while enabling in-block logical CNOTs without additional physical operations. Together, these results make precise how permutation-based logical entangling constrains code design within the HGP framework, demonstrate the circuit-level benefits of the unique family, and guide the search for phantom qLDPC families with better asymptotic parameters for low-overhead fault tolerance on neutral-atom hardware.

discussion (0)

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