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REVIEW 3 major objections 6 minor 70 references

Can Graph Learning Learn Circuits?

T0 review · 3 major / 6 minor · reviewed 2026-08-14 · deepseek-v4-flash

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Pith's one-line read This paper claims circuit localization can be framed as a supervised amortized graph learning problem; the best configuration reaches median edge AUROC 0.902 on 16 held-out InterpBench cases.

desk verdict Careful and honestly-scoped pilot for amortized circuit localization; the headline AUROC is plausible but the leakage-control checks don't cover task behavior, so treat 0.902 as a promising estimate rather than a proven transfer result. read the letter →

arxiv 2608.08536 v1 pith:QL2VMVNZ submitted 2026-08-09 cs.LG

Chester Tan , Moritz Lampert , Courtney Maynard , Ankit Ramakrishnan , Tina Eliassi-Rad , Ingo Scholtes This is my paper · ORCID
classification cs.LG
keywords circuitlocalizationmechanisticinterpretabilitygraphneuralnetworksamortizedlearningtransformeredgeAUROCresidualstreamTracr
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper asks whether circuit localization—finding the sparse subgraph of a transformer's computation graph that reproduces a behavior—can be learned once across many model–task pairs and then applied to new pairs. It claims yes: a supervised graph neural network trained on 50 semi-synthetic transformer cases transfers to 16 held-out cases, reaching a median edge AUROC of 0.902 (interquartile interval [0.861, 0.942]). Removing all message-passing edges drops the median to 0.825, which the paper reads as evidence that message passing over the computation graph contributes beyond node features. A second, per-case adaptation of a GNN explainer reaches 0.858, also above the no-message-passing control. If true, this would make circuit localization an amortized prediction task rather than a per-model optimization, and the paper explicitly restricts its claims to synthetic pairs with circuits known by construction.

What carries the argument

The load-bearing object is the component-level computation graph of a transformer, a directed acyclic graph whose nodes are attention heads and MLP blocks and whose edges are residual-stream-mediated pathways. GCL transforms it into a directed line graph (one node per candidate edge) or an incidence graph (component nodes plus edge nodes) so that circuit membership becomes node classification on the transformed graph. Each edge node carries six context-specific features—clean and corrupted source states, target gradient, clean and corrupted edge messages, and the gradient mapped back through the edge—aligned across heterogeneous dimensions by a 1D feature-attention layer borrowed from tabular foundation models, processed by either DirGNN or DAGformer, pooled over token positions and prompt pairs, and read out to edge scores. The motivating identity is the shared-target interaction formula, which shows that two edges entering the same read input interact through the Hessian of the task metric, giving the graph learner a principled reason to share information between computationally related pathways.

What would settle it

Train the same GCL configuration on the 50-pair pool and evaluate it on real transformers using a faithfulness metric: does the predicted circuit reproduce the target behavior when kept edges are clean and masked edges are corrupted? If faithfulness is no better than the no-message-passing control, or if replacing the three related-pair checks with a stricter program-template match drops the held-out median edge AUROC from 0.902 toward 0.825, the paper's central transfer claim is refuted.

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Extended reading notes

Core claim

The paper's central claim is that circuit localization can be framed as supervised amortized graph learning: build a component-level directed graph of a transformer whose edges are residual-stream pathways, train a GNN on labeled model–task pairs to predict circuit membership of each edge, and apply the same predictor to unseen pairs. On the 16 original held-out InterpBench cases, the best of 14 configurations (a directed line graph processed by a DirGNN GraphConv backend) scores a median edge AUROC of 0.902, close to the published EAP-IG median of 0.910 and below ACDC's 0.959; with all message-passing edges removed the median falls to 0.825, and an adapted PGExplainer reaches 0.858. The paper reports the top score as a post-selection estimate, since the configuration was chosen after evaluating all 14 on the held-out cases. It also proves a local interaction identity: for two edges feeding the same component input, the leading interaction equals $\Delta m_{e_1,p}^\top Q_{t,p} \Delta m_{e_2,p}$, a Hessian-weighted bilinear form of the two message changes, so edge relevance cannot in general be decomposed into independent scores.

Load-bearing premise

The claim assumes that circuits learned on small semi-synthetic transformers—whose ground-truth circuits are known by construction and which have no normalization layers—transfer to real transformers, and that the three related-pair checks used in the data split catch enough leakage that the held-out scores are not inflated by training/test similarity.

Editorial extensions

If this is right

  • Circuit localization can be amortized: after one training phase, a learned predictor localizes circuits for new model–task pairs without per-case optimization, reducing the sequential per-case cost.
  • Message passing over the observed computation graph carries signal: stripping all message-passing edges lowers median held-out AUROC from 0.902 to 0.825 while keeping nodes and features.
  • GNN explainability methods transfer to mechanistic interpretability: the PGExplainer adaptation reaches 0.858 median edge AUROC without using ground-truth circuits at fit time.
  • The framework produces edge-level scores that can be evaluated with the same head-promotion rule as existing baselines, making cross-case methods directly comparable to per-case circuit discovery.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • If GCL transfers to real transformers, circuit localization could become a reusable infrastructure task, but this depends on whether the regularity of Tracr-derived synthetic circuits survives contact with LayerNorm and learned representations.
  • The interaction identity suggests scalar edge scores are incomplete descriptors, yet GCL's readout still emits one score per edge; a testable extension is to make the predictor explicitly pair-aware, for example by predicting interaction terms or using the Hessian form as an auxiliary loss.
  • The paper's leakage-control split is explicitly acknowledged as incomplete; a stronger test would match latent program templates or circuit motifs rather than the three syntactic checks, and would likely lower the reported transfer numbers.
  • One could test the amortization hypothesis directly on real models by using faithfulness instead of AUROC: if predicted circuits reproduce behavior under causal masking as well as per-case baselines do, the synthetic-to-real gap is smaller than feared.
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Signed reviews

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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 6 minor

Summary. The paper proposes Graph Circuit Learning (GCL), a supervised, amortized framework that trains a graph neural network across multiple model-task pairs to predict circuit masks on unseen pairs, and also adapts PGExplainer to the per-model-task circuit localization setting. To support cross-case training, the authors augment InterpBench with 30 TracrBench-derived, SIIT-trained transformer-task pairs, reserve the 16 original InterpBench evaluation pairs as a held-out test set, and use grouped 5-fold cross-validation on the remaining 50 pairs. The best GCL configuration achieves a median edge AUROC of 0.902 on the held-out cases, close to the published EAP-IG median of 0.910 and below ACDC's 0.959; removing all message-passing edges reduces the median to 0.825, and the PGExplainer adaptation reaches 0.858. The paper also derives a local second-order interaction formula for two edge interventions at a shared component input (Proposition E.1) as motivation for graph-structured modeling of pathway dependencies.

Significance. If the transfer result survives closer scrutiny, this is a valuable step for mechanistic interpretability: it casts circuit localization as an amortized graph learning problem, contributes a new benchmark of 30 SIIT-trained TracrBench cases with a grouped split, provides an open implementation, and gives a clean interaction identity that justifies modeling edge interactions. The authors are commendably explicit about several limitations: the best configuration is flagged as a post-selection estimate (Section F.2), the benchmark is restricted to synthetic models without normalization layers, and the relatedness checks are acknowledged to be incomplete (Section D.2). The central scientific contribution is the framing and the controlled evidence that message passing over computation graphs can help predict circuits, rather than a claim of state-of-the-art performance on real transformers.

major comments (3)
  1. [D.2] The split's relatedness checks compare RASP program templates, exact ground-truth circuits, and directed circuit isomorphism, but none of the three checks compares task identity or input-output behavior. Since Table 1 shows that 26 original InterpBench pairs remain in the cross-validation pool while all 16 held-out cases come from InterpBench, a pair implementing the same task through a different RASP program or a non-isomorphic circuit can cross the split, allowing the GNN to memorize task-to-circuit mappings rather than learn a general localizer. The manuscript's own admission that these checks 'do not give a complete theoretical account' (Section D.2) makes this a known gap. To make the transfer claim load-bearing, I ask for a task-level relatedness check (e.g., normalized task templates, prompt-pair similarity, or behavioral equivalence on a shared probe set) and/or a sensitivity analysis that removes from the training pool any pair sharing a task family with a test case. Without this, both the observed 0.902 and the no-message-passing control 0.825 are upper bounds whose inflation is unquantified.
  2. [F.2] The abstract's headline median of 0.902 is the best of 14 configurations after evaluating all of them on the 16 held-out cases, as Section F.2 states: the result 'should be read as a post-selection estimate.' Cross-validation ranks this configuration second, and the configuration that would have been selected by cross-validation (DirGNN on the incidence graph) has a held-out median of 0.876. Presenting the post-selected number as the main result overstates the method's expected performance on unseen pairs. I ask the authors to report the cross-validation-selected configuration as the primary estimate, to present 0.902 as an exploratory upper bound, and to use a nested selection procedure or a separate validation split if they want to claim competitive parity with EAP-IG and ACDC.
  3. [F.2, Table 4] The claim that message passing over the observed computation graph contributes to performance rests on the comparison between the DirGraphConv line-graph configuration (median 0.902) and its no-message-passing control (median 0.825). The paper reports seed-level standard deviations of the medians but no paired comparison across the 16 cases; with only 16 cases and a 0.077 median gap, it is not clear how many cases actually improve and by how much. I ask for per-case paired differences (e.g., median of within-case differences, and a sign test or Wilcoxon signed-rank test). For the incidence-graph rows, the paper should also state explicitly what the control retains, because three of the six feature roles are stored on component nodes and become inaccessible to the edge readout when message-passing edges are removed.
minor comments (6)
  1. [Abstract] Consider qualifying the headline number in the abstract as a post-selection estimate so that readers do not mistake 0.902 for an unbiased evaluation of a pre-registered configuration.
  2. [D.1] The paper reports that 48 candidate pairs were constructed and 30 passed both behavior and compilation checks; please state how the 18 failures are distributed between compilation failures and reconstruction-check failures, since this affects the representativeness of the added benchmark cases.
  3. [E.4] Proposition E.1 is derived for infinitesimally small message changes, whereas the benchmark uses binary clean-versus-corrupted patching with potentially large deltas; the main text should explicitly say that the proposition is a motivation for graph structure rather than a guarantee for the actual benchmark interventions.
  4. [F.1, Table 4] The 18 hyperparameter settings per configuration are not enumerated; for reproducibility, include the full grid (learning rate, hidden dimension, number of layers, dropout, etc.) in an appendix.
  5. [D.2] The sentence 'so 84 of its 86 pairs enter the pool' is confusing because only 50 pairs remain after exclusion; rephrase to '84 are candidates; after removing groups containing test pairs, 50 remain.'
  6. [Figure 2] The caption states that baseline box plots are dashed because seed-level variability is unavailable; add a legend or note explaining that the published baseline values are point estimates from InterpBench and may not be directly comparable in their uncertainty.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the central transfer claim is evaluated against external ground-truth circuits, and the motivation theorem is a genuine Taylor-expansion identity.

full rationale

The paper's central claim is not circular: the 16 held-out InterpBench cases have ground-truth circuits fixed by external SIIT/Tracr constructions, and GCL's features (activations, gradients, and virtual-weight messages) are computed from the model and task, not from the label masks; no held-out mask enters training. The augmented 30 TracrBench pairs are added before the split and are excluded from the test group by the relatedness checks, so the test set is not used to fit the predictor. The interaction result in Section E is a Taylor-expansion identity used as motivation for graph structure, not as an assumption feeding the AUROC numbers. The paper's own disclosures, that the relatedness checks 'do not give a complete theoretical account' (Section D.2) and that the headline 0.902 is a 'post-selection estimate' (Section F.2), are limitations on external validity and statistical interpretation, not reductions of the claimed result to its inputs. There are no load-bearing self-citations: the benchmark, Tracr compilation, and baseline sources are external. No self-definitional, fitted-input-as-prediction, uniqueness-import, or ansatz-smuggling pattern is present.

Assumptions & free parameters 4 free parameters · 5 assumptions · 0 invented entities

No new physical or mathematical entities are introduced. The paper's assumptions are mostly domain-specific modeling choices about how transformers are represented as graphs and how circuit localization is defined. The key free parameters are architectural and training choices, selected by validation, plus the benchmark's implicit assumption that semi-synthetic circuits are representative.

free parameters (4)
  • Feature alignment dimension d_align = not reported in preprint
    Controls the fixed-width representation of heterogeneous feature vectors; chosen by the authors and selected through validation.
  • DirGNN aggregation weight alpha = 0.5 (stated)
    Combines incoming and reversed neighbor contributions with equal weight; chosen by hand rather than fitted.
  • Per-case BCE positive-class weight = max(1, n_other / max(n_circuit, 1))
    A hand-specified reweighting of circuit versus non-circuit edges; affects the training objective.
  • Hyperparameter settings (18 settings, 14 configurations) = selected via grouped 5-fold cross-validation
    Hyperparameters and training duration are selected on the cross-validation pool; the held-out best configuration is a post-selection estimate.
assumptions (5)
  • domain assumption The component-level computation graph with virtual weight W_e = W_I^t W_O^s exactly represents computational pathways in the studied transformers.
    Section A states this holds exactly for Tracr-derived SIIT models with no normalization layers, but not for typical transformers with LayerNorm.
  • domain assumption Edge-wise additive masking (replacing clean messages with corrupted ones) is a valid intervention model for circuit localization.
    Used throughout the GCL objective and evaluation; inherited from InterpBench-style circuit localization.
  • domain assumption The three related-pair similarity checks (program template, exact circuit, circuit isomorphism) sufficiently prevent leakage between training and held-out pairs.
    Section D.2 admits these checks are incomplete and that a full account is future work.
  • standard math Proposition E.1 requires L_t,p to be twice continuously differentiable with locally Lipschitz Hessian over the intervention surface.
    The appendix itself notes this does not apply at ReLU kinks or to L1, argmax, and discrete task metrics; it is a conditional local illustration.
  • domain assumption Ground-truth circuits from Tracr compilation and SIIT training are correct and unique enough to serve as supervision.
    Section H states there is no established unique ground truth for real transformers; the benchmark relies on circuits known by construction.

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Pith. "Pith review of Can Graph Learning Learn Circuits?." pith.science (2026). https://pith.science/paper/QL2VMVNZ

@misc{pith2026260808536,
  author       = {Pith},
  title        = {Pith review of: Can Graph Learning Learn Circuits?},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/QL2VMVNZ}},
  note         = {Machine review of arXiv:2608.08536}
}
abstract

Circuit localization is a mechanistic interpretability task whose goal is to identify a sparse subgraph of a transformer's computation graph sufficient to reproduce a particular behavior. Most established methods localize circuits independently for each model--task pair. We instead frame circuit localization as a graph machine learning problem in which the edges of a computation graph represent computational pathways, and graph neural networks (GNNs) model interactions among these pathways. We introduce Graph Circuit Learning (GCL), a supervised, amortized framework that trains a GNN across multiple model--task pairs and applies it to unseen cases. To provide sufficient data, we augment the InterpBench benchmark with additional cases derived from the TracrBench programs. Of the 14 evaluated GCL configurations, the highest scored a median edge AUROC of $0.902$ (interquartile interval $[0.861, 0.942]$) on the 16 original held-out InterpBench cases. This is close to the published InterpBench median of $0.910$ for EAP-IG while remaining below ACDC's $0.959$. Removing all message-passing edges reduces the median to $0.825$. We also adapt PGExplainer, a GNN explainability method, to circuit localization, obtaining a median edge AUROC of $0.858$ on the same cases. These preliminary results suggest that graph machine learning offers a natural and potentially powerful perspective on circuit localization, and we hope this perspective encourages closer exchange between the two communities.

Figures

Figures reproduced from arXiv: 2608.08536 by the authors.

Figure 1
Figure 1. An overview of (a) the component-level computation graph construction and (b) the per-case circuit localization vs. cross-case circuit learning. end-to-end against the ground-truth masks with binary cross-entropy. Further implementation details are provided in Section B. Figure 1b illustrates our primary graph-learning architecture, which comprises five stages: graph transformation, feature alignment, graph learning… view at source ↗
Figure 2
Figure 2. Edge AUROC across the 16 held-out INTERPBENCH cases. For our methods (solid box outlines), scores are averaged over 5 random seeds within each case; capped dotted intervals beside each box show ±1 seed-level standard deviation for each summary statistic. Corresponding seed-level variability is unavailable for the published baselines (dashed box outlines). The highlighted GCL configuration uses DirGNN with a GraphCon… view at source ↗
Figure 3
Figure 3. Residual-stream view of an n-layer decoder-only transformer. Attention heads (yellow) and MLP blocks (pink) read from the residual stream through input projections (blue) and write additive updates back through output projections (red). this virtual weight is given by W ∗j I W∗i O , (2) where W∗i O is the write projection of the upstream component and W ∗j I is the read projection of the downstream component. This v… view at source ↗
Figures from the paper (2 more)
Figure 4
Figure 4. Figure 4: Component-level directed acyclic graph induced by the residual stream. Edges represent possible residual-stream-mediated activation pathways from upstream writes to downstream reads. Attention heads have separate query, key, and value read pathways. 11 [PITH_FULL_IMAG…
Figure 5
Figure 5. Figure 5: Comparison of the original PGExplainer procedure and our adaptation to circuit localization. In the upper panel, PGExplainer [11] scores each graph edge using representations produced by a trained GNN for the edge’s two endpoint nodes. In the lower panel, our adaptatio…

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Pith tools

Reviewed August 14, 2026 · model on record in the stance chip above.