Paper Citation Record · LEDGER

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation

As of 7 August 2026, this Paper Citation Record lists 36 of 36 outbound references and 0 inbound Pith citation observations for arXiv:2607.27776.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2607.27776 v1

Coverage vector

measured 36 of 36 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-01T01:40:58.848048Z

measured 36 of 36 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-07T06:34:17.273281+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

36 of 36 outbound references displayed

verified exact0
verified fuzzy0
unresolved36
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 28407233-8ed1-4a08-9ba7-2411afb675ca · outbound

This paper cites Fung, Jonathan Valamehr, Mohammad Bidmeshki, Piotr Sapiecha, Steve Brown, Krish- nendu Chakrabarty, Ramesh Karri, and Benjamin Tan.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Fung, Jonathan Valamehr, Mohammad Bidmeshki, Piotr Sapiecha, Steve Brown, Krish- nendu Chakrabarty, Ramesh Karri, and Benjamin Tan

Reference 1

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:53.632308Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 652db53f-a3b0-4fd9-8165-7345dce17f5d · outbound

This paper cites LASHED: LLMs And Static Hardware Analysis for Early Detection of RTL Bugs.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation LASHED: LLMs And Static Hardware Analysis for Early Detection of RTL Bugs

Reference 2

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:53.775456Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ef572938-89dd-47a8-8a25-c67b95aee334 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 3

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:53.845039Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 858ee984-400d-43d4-98ce-2f2c180b54d2 · outbound

This paper cites Fung, Ahmad-Reza Sadeghi, and Jeyavijayan Rajendran.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Fung, Ahmad-Reza Sadeghi, and Jeyavijayan Rajendran

Reference 4

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:53.973100Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation dcdcf880-2607-47b7-a666-927f8685c5c7 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 5

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:54.365321Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f8ca6e66-6196-4369-939b-67a5cbde08af · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:54.496525Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 23eab3db-f73c-4988-a30c-f88a411b353f · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 7

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:54.666517Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 26013191-ee4d-48ed-bc1a-cb12f823cfb7 · outbound

This paper cites SVAgent: AI Agent for Hardware Security Verification Assertion.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation SVAgent: AI Agent for Hardware Security Verification Assertion

Reference 8

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:54.789479Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7788e3ed-2b3e-416a-b438-df54ae48f862 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:54.958537Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation af55ce34-30b2-42a1-b1d3-73e394566e16 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 10

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:55.035408Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation fa971ca5-126e-41ed-b7f4-b9aadf86e911 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:55.206037Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation bb6f2bac-1e6f-4ab1-bb09-0b0556846b81 · outbound

This paper cites LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification

Reference 12

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:55.336980Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 3af34a85-a606-4556-9c13-d53f5ac1bf22 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:55.448505Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 28072147-46d8-4e5e-abc6-f6427d4a53d5 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 14

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:55.575002Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1a4101eb-3a9a-4052-b08f-52485a35f63b · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 15

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:55.777118Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1e61a12b-25b7-4c68-aa06-f6ee3cc323ac · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 16

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:56.126032Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9141edfc-1798-4dca-b2a5-647f3c5deccd · outbound

This paper cites Unlocking Hardware Security Assurance: The Potential of LLMs.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unlocking Hardware Security Assurance: The Potential of LLMs

Reference 17

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:56.256129Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a0f0526a-00f1-40fe-a7e8-e6280a48d91e · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 18

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:56.393948Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation bb0192a6-9411-4644-9b6c-118185bd727c · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 19

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:56.511948Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1012f873-4b9c-4db1-87f2-cb8bc63be93f · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:56.652420Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation aabfb7ee-4bad-4b1e-8344-be7665f3fb6d · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 21

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:56.770482Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f00c2c83-0cc7-4dda-8044-f1b25d944a39 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 22

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:56.928658Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a246699e-de2f-4f69-b727-55d7b9447d12 · outbound

This paper cites DIVAS: An LLM-based End-to-End Framework for SoC Security Analysis and Policy-based Protection.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation DIVAS: An LLM-based End-to-End Framework for SoC Security Analysis and Policy-based Protection

Reference 23

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:57.095028Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 67d80822-8cc9-4c1e-a492-d6ea90505902 · outbound

This paper cites AKER: A Design and Verification Framework for Safe andSecure SoC Access Control.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation AKER: A Design and Verification Framework for Safe andSecure SoC Access Control

Reference 24

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:57.252085Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 5f5c1da1-f615-43be-9669-b94cde493c20 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 25

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:57.403322Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 11c5173e-4e89-4cd6-9d79-d4d3c7e8741f · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 26

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:57.553013Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1f803815-2388-4e0b-b271-c6aa498f947b · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 27

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:57.653664Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4b7b053e-0cfa-4452-8f59-ec94ff23be2f · outbound

This paper cites FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols

Reference 28

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:57.849628Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation df89f2af-a8d4-4475-b302-62ccbad05826 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 29

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:58.039744Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c3d92b7c-33a8-4006-8a8b-fb03f685ac96 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 30

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:58.207285Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f8cb3bcd-0f3b-48ce-a2cf-0c20533b2ca1 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 31

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:58.336437Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c56350e2-ec15-4c5f-8cb4-3214aa63d858 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 32

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:58.522844Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 44e090ff-1c67-4ff1-b51a-3dbd83b24b87 · outbound

This paper cites Zhang and C.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Zhang and C

Reference 33

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:58.688739Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 864207f9-ef0c-44d4-a27a-6c758706f2a9 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 34

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:58.848048Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 86d635e1-ba5c-4551-983d-a359a0ddc919 · outbound

This paper cites an unresolved cited work.

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation Unresolved cited work

Reference 2018

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:55.953853Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 77938e6a-4566-4255-a36b-fcbaaea16291 · outbound

This paper cites InProceedings of the 28th USENIX Conference on Security Symposium(Santa Clara, CA, USA) (SEC’19).

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation InProceedings of the 28th USENIX Conference on Security Symposium(Santa Clara, CA, USA) (SEC’19)

Reference 2019

Resolution: unresolved; no resolver link, observed 2026-08-01T01:40:54.191778Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Pith citing papers

No inbound Pith citation observations are available.