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REVIEW 2 major objections 5 minor 74 references

PowerSensor3: A Fast and Accurate Open Source Power Measurement Tool

T0 review · 2 major / 5 minor · reviewed 2026-08-16 · deepseek-v4-flash

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Pith's one-line read PowerSensor3 is an open-hardware measurement tool that samples power at 20 kHz and reveals GPU transients that built-in sensors updating at about 10 Hz miss.

desk verdict A genuinely useful, openly released 20 kHz power sensor for GPU/SSD energy work, with a real but fixable inconsistency between the theoretical accuracy bound and the measured low-load noise. read the letter →

arxiv 2504.17883 v1 pith:4QTW4R3N submitted 2025-04-24 cs.PF astro-ph.IM

Steven van der Vlugt , Leon Oostrum , Gijs Schoonderbeek , Ben van Werkhoven , Bram Veenboer , Krijn Doekemeijer , John W. Romein This is my paper · ORCID
classification cs.PFastro-ph.IM
keywords powermeasurementopenhardwareGPUprofiling20kHzsamplingPCIeenergyefficiencycurrentsensorauto-tuning
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

PowerSensor3 is an open-hardware, open-software measurement tool for the power consumption of PCIe devices and embedded boards. It samples voltage and current at 20 kHz through modular sensor boards and derives power as their product, with a theoretical worst-case accuracy of ±4.2 W for its 12 V / 10 A module. The paper argues that this speed matters: on one recent GPU, PowerSensor3 showed clear power dips between the phases of a single kernel, while the GPU's built-in sensor, updating near 10 Hz, missed them; on a GPU from another vendor, the external measurements closely tracked the built-in sensor. The paper also shows that powering an auto-tuner with this measurement backend cut the time needed to tune a beamforming application for energy efficiency by 3.25 times. The designs, firmware, and host libraries are released openly, putting sub-millisecond power measurement within reach of researchers without commercial instrumentation.

What carries the argument

The central machinery is the modular sensor chain: a baseboard with up to four interchangeable sensor boards, each carrying a differential Hall current sensor and an optically isolated voltage amplifier, feeding a 24 MHz ADC that averages six samples per channel to emit 20 kSamples/s over USB, with a remote-sense connector moving the voltage reference point to the load. The accuracy argument rests on the error-propagation identity $E_p = \sqrt{(U E_i)^2 + (I E_u)^2 + (E_i E_u)^2}$ derived from $P = (U+E_u)(I+E_i)$, where $E_i$ is dominated by the Hall sensor's 115 mArms datasheet noise and $E_u$ by quantization plus amplifier noise through the voltage divider.

What would settle it

Measure a constant 0.5 A load on a 12 V / 10 A module with a calibrated laboratory supply and electronic load, and record at 20 kHz for several seconds; if the peak-to-peak spread of power readings consistently exceeds the stated worst-case accuracy of roughly ±4.2 W, as the paper's Table II already suggests, then the accuracy claim as stated is falsified.

Watch

Extended reading notes

Core claim

The central claim is that a cheap, modular, open design can deliver sub-millisecond power measurements accurate enough to make GPU power visible at kernel granularity. Each sensor board pairs a differential Hall current sensor with an optically isolated voltage sensor, and the microcontroller streams 20 kSamples/s to the host over USB. The paper characterizes the error budget with $P = (U+E_u)(I+E_i)$, so the power error is $E_p = \sqrt{(U E_i)^2 + (I E_u)^2 + (E_i E_u)^2}$; at low loads current-sensor noise dominates, and at high currents voltage-sensor noise dominates. In the GPU case study the measured signal shows transient phases and dips that the vendor's roughly 10 Hz readings do not, and in the tuning case study the 3.25x speedup comes from measuring each kernel variant once instead of running it for seconds to gather enough samples. For devices without built-in power instrumentation, such as PCIe SSDs and SoC boards, the tool supplies measurements where none existed.

Load-bearing premise

The headline accuracy figures assume the Hall current sensor's datasheet noise of 115 mArms and the isolated voltage sensor's datasheet performance are realized in the assembled, cabled module; if those specifications do not hold in practice, the quoted ±4.2 W worst-case accuracy does not follow, and the paper's own 20 kHz measurements at a 0.5 A load (6.38 W peak-to-peak) already look inconsistent with that bound.

Editorial extensions

If this is right

  • GPU energy accounting can be done at kernel or even sub-kernel granularity without artificially lengthening workloads, because the 20 kHz stream resolves transients that roughly 10 Hz built-in sensors average away.
  • Auto-tuners that optimize for energy can benchmark each code variant directly and briefly, cutting tuning time; the paper reports a 3.25x reduction for a beamforming application.
  • PCIe devices without power instrumentation, such as NVMe SSDs, NICs, FPGAs, and domain-specific accelerators, can be monitored externally at sub-millisecond resolution, making SSD power behavior visible independently of bandwidth.
  • The open, modular design and one-time calibration mean a research group can reproduce the hardware, swap sensor boards for different power ranges, and integrate the measurements into its own software stack.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • A natural next step the paper does not take is to use the 20 kHz channel to build per-operation or per-kernel power models on GPUs, since phase boundaries visible in the traces can be aligned with kernel launch and memory events.
  • The apparent gap between the stated ±4.2 W bound and the measured 6.38 W peak-to-peak spread at a 0.5 A load suggests that adopting a statistical definition of accuracy, such as a confidence interval on the distribution of readings, would make the headline claim testable; until then, the bound is best read as a design target.
  • Because the sensor boards are interchangeable, synchronized measurements on multiple rails or multiple baseboards could give whole-node power attribution per component, which the present paper only hints at with its four-sensor baseboard.
  • For storage, 20 kHz sampling could expose per-command power spikes in SSDs that one-second averages hide; the paper mentions future sub-millisecond SSD work, so this is an open direction.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

2 major / 5 minor

Summary. The paper presents PowerSensor3, an open-source hardware/firmware/software toolkit for external power measurement of PCIe devices, SoC boards, and peripheral cards. The hardware uses a modular baseboard with up to four sensor modules, a Hall-based current sensor, an optically isolated voltage sensor, and an STM32 microcontroller sampling at up to 20 kHz. The authors characterize sensor accuracy with a current sweep against Fluke reference instruments, a 50-hour stability test, and step-response measurements. They then demonstrate the tool in three use cases: NVIDIA and AMD GPU power profiling, NVIDIA Jetson AGX Orin measurement, and SSD power analysis. The central claims are that the 12 V/10 A module achieves a theoretical worst-case power accuracy of ±4.2 W, that 20 kHz sampling reveals transients missed by NVML, and that integration with Kernel Tuner reduces auto-tuning time by 3.25x.

Significance. If the accuracy and sampling claims hold, PowerSensor3 is a valuable open tool for energy-efficiency research, filling a gap left by vendor sensors with ~10 Hz update rates and by expensive or non-open commercial instruments. The paper's strengths include the open-hardware and open-software releases with archived DOIs, the use of external reference instruments for accuracy evaluation, the 50-hour stability check, and real application demonstrations on GPUs, an SoC, and an SSD. The 20 kHz capability is demonstrated by visible power transients that NVML misses, which is a concrete and falsifiable contribution. The main weakness is that the accuracy numbers in Section III-A and Section IV-A are stated without a precise statistical definition, which currently makes the headline 'accurate' claim difficult to verify.

major comments (2)
  1. [IV-A, Table II; III-A, Table I] Table II's caption and column semantics must be fixed before the accuracy claim can be evaluated. The caption says 'error values' and '8 A load', but the rows are 0.5 A and 1 A loads, and the min/max entries are centered on 6 W and 12 W, respectively, indicating that they are measured power readings rather than signed errors. If that is the case, the 20 kHz peak-to-peak ranges of 6.38 W (0.5 A) and 7.685 W (1 A) correspond to worst-case absolute deviations of roughly 3.22 W and 4.21 W from the expected powers, which would be within the Table I '±4.2 W' bound; the paper should state this explicitly. If the entries really are errors, the large positive values imply a bias that is not discussed elsewhere. Please rewrite the caption, define min/max/p-p/std, give the expected power at each load, and correct the '8 A load' statement.
  2. [III-A, Table I] The 'theoretical worst-case accuracy' in Table I is not derived in a checkable way. The text reports a Hall-sensor noise of 115 mArms and calls 4.1 W the resulting 'peak-to-peak error', yet Table I lists current error ±0.35 A and power ±4.2 W. Please state the assumed conversion from RMS to peak-to-peak (or define the confidence level), the operating point (nominal voltage and current) used in E_p = sqrt((U*E_i)^2 + (I*E_u)^2 + (E_i*E_u)^2), and how quantization, calibration offset, and voltage-divider noise enter the ±28.6 mV and ±0.35 A entries. Without this definition, the headline accuracy cannot be checked against the measurements in Section IV.
minor comments (5)
  1. [IV-B] Report the numerical drift in the minimum and maximum power values over the 50-hour test, not only the ±0.09 W fluctuation of the averages, to support the 'no recalibration needed' claim.
  2. [IV-C] Quantify the step response with rise time and settling time rather than only showing the waveform, so readers can compare the dynamic performance with other instruments.
  3. [V-A2] The 3.25x tuning-time comparison depends on an estimated 7394 s for the onboard-sensor method; state the estimation assumptions, such as the number of repeated kernel executions and the assumed run duration per configuration.
  4. [Fig. 4] The axis labels in Figure 4 are garbled in the current PDF; ensure the figure is legible and that the axis label clearly states whether the plotted quantity is power error or measured power.
  5. [III-A] The claim that the current sensors are 'hardly sensitive' to external magnetic fields is not experimentally demonstrated; a short comparative test with a nearby current-carrying conductor would support this design claim.

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: the central accuracy and use-case claims are externally benchmarked and do not reduce to paper inputs or self-citations.

full rationale

This is a hardware characterization paper, not a derivation. The central accuracy claims are established by direct measurement against external reference instruments (Keysight N6705B supply, Kniel E.Last electronic load, and Fluke 177/77 DMMs) in Section IV-A, rather than by predicting those measurements from the claimed result. The theoretical worst-case bounds in Table I are assembled from independently published component datasheets (MLX91221 Hall sensor, ACPL-C87B voltage sensor) using the stated error-propagation formula Ep = sqrt((U*Ei)^2 + (I*Eu)^2 + (Ei*Eu)^2), which is a parameter-free combination of component specifications and not a fit to the measured data. The 20 kHz versus NVML transient demonstration in Section V-A is an external comparison of two independent measurement paths and does not assume the conclusion. Self-citations to PowerSensor2, PMT, Kernel Tuner, and Tensor-Core Beamformer appear, but they are used as prior-art context or as tools in the case studies; the paper's own wall-clock timings and externally benchmarked sensor readings do not depend on those citations for their evidentiary force. The apparent discrepancy between Table I's theoretical +/-4.2 W bound and Table II's measured 20 kHz peak-to-peak error is a correctness and consistency concern, not a circularity, because the theoretical bound is derived from datasheet noise specifications rather than from the measured data.

Assumptions & free parameters 2 free parameters · 3 assumptions · 0 invented entities

The central accuracy claims depend on per-device calibration and datasheet noise assumptions; no new physical entities are introduced. The paper is a measurement-instrument report, so the main burden is calibration and reference-instrument quality.

free parameters (2)
  • Sensor calibration offset and gain
    Section III-D: calibration measures 128k samples of unloaded sensors to determine offset error of Hall sensor and gain error of voltage sensor, stored on the microcontroller. The reported accuracy depends on these per-device fitted constants.
  • RMS to peak-to-peak conversion factor for Hall noise = ~3 sigma (implied by 4.1 Wpp from 0.115 Arms at 12 V)
    Section III-A: the 'peak-to-peak error of 4.1 Wpp' is derived from the MLX91221's 115 mArms noise. The conversion factor to peak-to-peak is not stated; if the true noise distribution is not Gaussian or the factor differs, the worst-case table changes.
assumptions (3)
  • domain assumption The Fluke 177/77 DMMs and Kniel E.Last electronic load provide a sufficiently accurate reference for current and voltage, so the reported error is attributable to PowerSensor3.
    Section IV-A and Figure 3: expected power is derived from these instruments, but their calibration uncertainty is not reported.
  • domain assumption The MLX91221 Hall sensor and ACPL-C87B isolated amplifier meet their datasheet noise and bandwidth specifications in the assembled PowerSensor3.
    Section III-A: the theoretical worst-case accuracy (Table I) and the 115 mArms Hall noise figure are taken from datasheets; the measured 20 kHz noise appears to exceed the derived worst case, suggesting the datasheet assumption may be optimistic.
  • domain assumption The error propagation formula assumes independent voltage and current errors with no correlation from the shared ADC or noise sources.
    Section III-A: Ep = sqrt((U*Ei)^2 + (I*Eu)^2 + (Ei*Eu)^2) is valid for independent errors; the firmware samples two consecutive ADC channels, so some correlated noise may exist.

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Cite this review

Pith. "Pith review of PowerSensor3: A Fast and Accurate Open Source Power Measurement Tool." pith.science (2026). https://pith.science/paper/4QTW4R3N

@misc{pith2026250417883,
  author       = {Pith},
  title        = {Pith review of: PowerSensor3: A Fast and Accurate Open Source Power Measurement Tool},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/4QTW4R3N}},
  note         = {Machine review of arXiv:2504.17883}
}
read the original abstract

Power consumption is a major concern in data centers and HPC applications, with GPUs typically accounting for more than half of system power usage. While accurate power measurement tools are crucial for optimizing the energy efficiency of (GPU) applications, both built-in power sensors as well as state-of-the-art power meters often lack the accuracy and temporal granularity needed, or are impractical to use. Released as open hardware, firmware, and software, PowerSensor3 provides a cost-effective solution for evaluating energy efficiency, enabling advancements in sustainable computing. The toolkit consists of a baseboard with a variety of sensor modules accompanied by host libraries with C++ and Python bindings. PowerSensor3 enables real-time power measurements of SoC boards and PCIe cards, including GPUs, FPGAs, NICs, SSDs, and domain-specific AI and ML accelerators. Additionally, it provides significant improvements over previous tools, such as a robust and modular design, current sensors resistant to external interference, simplified calibration, and a sampling rate up to 20 kHz, which is essential to identify GPU behavior at high temporal granularity. This work describes the toolkit design, evaluates its performance characteristics, and shows several use cases (GPUs, NVIDIA Jetson AGX Orin, and SSD), demonstrating PowerSensor3's potential to significantly enhance energy efficiency in modern computing environments.

Figures

Figures reproduced from arXiv: 2504.17883 by the authors.

Figure 1
Figure 1. Schematic of a PowerSensor3 measurement setup. [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. 3D rendering of PowerSensor3 with PCIe 8-pin, 20 A, 10 A, [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗
Figure 3
Figure 3. Measurement setup for accuracy assessment. [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figures from the paper (11 more)
Figure 4
Figure 4. Figure 4: Power error for four types of sensors with dotted lines [PITH_FULL_IMAGE:figures/full_fig_p006_4.png]
Figure 6
Figure 6. Figure 6: A node in the DAS6 [50] cluster computer equipped with a [PITH_FULL_IMAGE:figures/full_fig_p007_6.png]
Figure 8
Figure 8. Figure 8: Tuning results for the Tensor-Core Beamformer on the [PITH_FULL_IMAGE:figures/full_fig_p008_8.png]
Figure 7
Figure 7. Figure 7: Energy measurements for a synthetic GPU workload using [PITH_FULL_IMAGE:figures/full_fig_p008_7.png]
Figure 11
Figure 11. Figure 11: The NVMe to PCIe adapter with the Samsung 980 PRO [PITH_FULL_IMAGE:figures/full_fig_p009_11.png]
Figure 10
Figure 10. Figure 10: Tuning results for the Tensor-Core Beamformer on the [PITH_FULL_IMAGE:figures/full_fig_p009_10.png]
Figure 12
Figure 12. Figure 12: Power and bandwidth results for the Samsung 980 PRO benchmarking: (a) random reads; (b) random writes. [PITH_FULL_IMAGE:figures/full_fig_p010_12.png]
Figure 14
Figure 14. Figure 14: Schematic of a PowerSensor3 measurement setup for PCIe [PITH_FULL_IMAGE:figures/full_fig_p013_14.png]
Figure 13
Figure 13. Figure 13: Overview of components involved in the PowerSensor3 [PITH_FULL_IMAGE:figures/full_fig_p013_13.png]
Figure 15
Figure 15. Figure 15: Assembly instructions for the PowerSensor3 baseboard and [PITH_FULL_IMAGE:figures/full_fig_p014_15.png]
Figure 16
Figure 16. Figure 16: Assembled PowerSensor3 baseboard with three sensor mod [PITH_FULL_IMAGE:figures/full_fig_p014_16.png]

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Pith tools

Reviewed August 16, 2026 · model on record in the stance chip above.