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Readout can be cut to 600 ns with almost no QEC penalty

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2026-08-04 17:57 UTC pith:DO66ZUN5

load-bearing objection First real readout-to-logical-error-rate benchmark, with solid per-shot findings and careful methodology, but the QEC-level conclusions hinge on a simulator choice that is disclosed but not fully resolved. the 4 major comments →

arxiv 2608.01939 v1 pith:DO66ZUN5 submitted 2026-08-03 quant-ph

Oraqle: An Empirical Analysis of Qubit Readout and Discriminators in Quantum Error Correction

Emmanouil Giortamis , Aleksandra \'Swierkowska , Sandra Stankovic , Felix Gust , Benjamin Lienhard , Pramod Bhatotia This is my paper
classification quant-ph MSC 81P7081P6868T05 PACS 03.67.Pp
keywords quantum error correctionqubit readoutmeasurement durationmachine learning discriminatorsFPGA control hardwarelogical error ratereadout fidelity
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper introduces a benchmarking pipeline that connects raw qubit-readout signals to logical error rates in quantum error correction. It claims that measurement duration can be cut from 1 microsecond to about 600 nanoseconds at nearly no cost to the logical error rate, because most discriminative information arrives in the first half of the window. It also claims that discriminator complexity is largely irrelevant: a compact model with a few thousand parameters matches or beats models millions of parameters large, since residual classification errors are set by device physics, not by model capacity. Finally, it argues the impact of readout on QEC is conditional: it matters in near-threshold, measurement-limited regimes, and the window where it matters widens as hardware improves.

Core claim

The central discovery is an asymmetry: the readout window and the discriminator sit at the end of a chain, but their importance is opposite to their complexity. Most of the signal that separates |0> and |1> arrives within about 0.5 microseconds, so truncating the readout from 1000 to 600 ns raises per-shot error by about 10 percent yet leaves the logical error rate nearly unchanged at responsive code distances. Conversely, exchanging a multi-million-parameter discriminator for a few-thousand-parameter one changes the logical error rate by only a few percent, because roughly 99.8 percent of residual misclassifications come from low-SNR boundary ambiguity and mid-measurement T1 relaxation — ph

What carries the argument

The key mechanism is the end-to-end pipeline: experimentally extracted (I,Q) readout traces feed a discriminator stage (six ML models plus a linear baseline), per-shot classification outputs are converted into duration-dependent measurement error rates, and those are injected into circuit-level QEC simulations across six codes and multiple noise models. The load-bearing identity is the information-gain rate over the readout window, which peaks near 0.3 microseconds and turns negative past about 1 microsecond, explaining why truncating at 600 ns costs so little. A second mechanism is the per-shot error taxonomy (near-boundary, T1 relaxation, leakage), which shows that 97.4 percent of residual

Load-bearing premise

The entire empirical basis is one five-qubit superconducting device's readout traces, and the QEC-level conclusions come from a simulator the authors chose after it disagreed with an independent simulator on the surface-code test; if other devices have slower resonator ring-up or a different noise model, the quantitative 600 ns advice may not hold.

What would settle it

Measure readout fidelity versus duration on a second superconducting device with a slower resonator ring-up: if the fidelity plateau pushes past 800 ns, the specific 600 ns recommendation fails. Likewise, if a different simulator noise model shows that truncating from 1000 to 600 ns raises the logical error rate by more than a few percent at distance 5, the near-zero QEC cost claim collapses.

Watch this falsifier. Get emailed when new claim-graph text bears on it.

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If this is right

  • Control-hardware engineers can default to about 600 ns readout windows, reclaiming roughly 40 percent of readout latency at negligible logical-error-rate cost in the tested regime.
  • Discriminator designers can stop scaling model size: a few-thousand-parameter model already reaches the physical fidelity wall, and larger models only increase FPGA resource use.
  • QEC architects should treat measurement duration as a performance lever only in near-threshold, measurement-limited regimes; elsewhere it is a latency win, not a fidelity win.
  • Measurement-limited codes such as Bacon-Shor are particularly sensitive to readout quality, and improving readout fidelity alone can revive them.
  • As hardware matures with all error rates reduced, the roughly 600 ns optimum becomes a first-class knob across more codes and distances, but only alongside better gates.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The 0.3 microsecond information-gain peak likely reflects this dataset's resonator ring-up; on devices with slower ring-up the optimal truncation point may shift, so the quantitative 600 ns advice should be re-measured per device.
  • If residual errors are set by physics rather than the model, readout-discriminator benchmarks should report per-shot error types (near-boundary vs. relaxation) instead of a single accuracy number, because only the boundary-shift portion is improvable.
  • The conditional claim is directly testable: on a device near its code threshold, sweeping readout duration should produce a U-shaped logical-error-rate curve with a minimum near the fidelity plateau; on a device far below threshold, the curve should be flat.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit.

Referee Report

4 major / 5 minor

Summary. The paper introduces Oraqle, an end-to-end benchmarking framework that links raw IQ readout traces, ML-based qubit-state discriminators, and QEC simulators, and uses it to study how readout duration and discriminator choice affect logical error rates. The authors evaluate six discriminators on a single experimentally extracted 5-qubit dataset (Lienhard et al.), characterize readout-fidelity saturation and the timing of discriminative information, then feed the resulting per-shot flip-error curves into QEC simulations across six codes, two simulators, and current/future noise models. Three headline findings are claimed: measurement duration can be cut to roughly 600 ns at negligible QEC cost; QEC logical error rate is largely insensitive to discriminator complexity; and the impact of readout is conditional on the hardware regime, widening as devices improve.

Significance. If the findings hold, they are practically actionable: control-hardware engineers could shorten readout windows, and FPGA resource budgets could favor compact discriminators without sacrificing logical fidelity. The paper has substantial strengths: every discriminator is retrained at every duration, the linear baseline is refit at every truncation, HERQULES protocol choices are disclosed in detail, the readout-flip ablation in Appendices G and H cleanly identifies the cause of the 600 ns optimum, and the attempt to cross-validate with two independent simulators is commendable. The standardized, same-protocol comparison of six discriminators on identical traces is itself a useful contribution independent of the QEC-level claims. However, the QEC-level conclusions rest on ECCentric alone after that simulator diverged qualitatively from lattice-sim on the CNOT cross-check, and the headline that discriminator complexity barely matters is in tension with the paper's own Fig. 13. These issues are load-bearing for the central claims and require additional evidence or substantial qualification.

major comments (4)
  1. [§6.1 / App. F / Figs. 15–19] The QEC-level conclusions are generated exclusively with ECCentric after the paper's own cross-validation showed a qualitative divergence: on the surface-code CNOT, ECCentric gives LER ≈ 0.5 flat across duration and distance, while lattice-sim gives a U-shaped curve orders of magnitude lower. The six-code memory sweeps that carry the headline '~600 ns plateau' and the 'small-d only' conditionality are not replicated in lattice-sim. Because the two simulators disagree on whether the circuits are above threshold, the plateau and its regime dependence could be an ECCentric-specific artifact. This is not an internal inconsistency—the disclosure is honest—but it is a load-bearing gap. Please run the same six-code memory sweeps (Figs. 15–19) in lattice-sim, or another independent simulator, and report both; if lattice-sim shows duration dependence at larger d or a different plateau shape, the
  2. [§6.2 / Apps. G–H / §3.3 Stage 1] The ~600 ns optimum is traced to the trace-derived flip-error curve, but that curve is measured on a single 5-qubit device with T1 = 12–41 μs, while the QEC simulations use ibm_boston coherence (T1 = 284.95 μs, T2 = 322.68 μs). The balance between short-trace flip error and idle decoherence/backlog that creates the plateau is therefore specific to a pairing of a legacy readout dataset with a modern gate/coherence model. The general advice to cut readout to ~600 ns assumes this pairing is representative. Please add a robustness study that varies ring-up time, per-qubit SNR, and T1 within plausible ranges (or uses a second dataset if one becomes public), and qualify the quantitative advice accordingly.
  3. [Abstract / §6.1 / Takeaway #6] The claim that 'QEC logical error rate is largely insensitive to discriminator complexity' is difficult to reconcile with Fig. 13, where at d = 5, surface code, 1000 ns, the spread across discriminators reaches 69% (QubiCML 0.103 vs. MCMit-CNN 0.061), and Takeaway #6 itself says 'the discriminator still plays a clear role (up to 69%)'. If 'complexity' means parameter count only, the text should say so explicitly and distinguish it from discriminator family and preprocessing; as written, the abstract's headline overstates the insensitivity.
  4. [§6.1 / Figs. 13–14] The quantitative claims ('up to ~590% swing', '≤6% gap', '~2.4% average spread') are reported without confidence intervals or repeated-seed statistics. Since QEC simulations are stochastic and the d = 12 spread is attributed to sampling noise without error bars, the reader cannot assess whether the small-d effects are significant or whether the large-d flatness is real. Please report at least standard errors or multiple independent runs for the key LER comparisons.
minor comments (5)
  1. [§3.3 Stage 1] 'No other raw-trace dataset is publicly available' is a key limitation but appears only in the methodology. It should be restated in the abstract or conclusions so the conditionality of the quantitative readout guidance is visible to a reader who does not read the full methodology.
  2. [§4.1 / Fig. 6] The y-axis in Fig. 6(a) starts at 0.55, which exaggerates the plateau and decline. Please consider starting at 0 or annotating the computed relative drops, and specify how the 'up to ~40% relative drop' is calculated.
  3. [§5.2 / Table 5] The KLiNQ resource row is confusing without the footnote about per-qubit replication and the mixed student/larger-teacher assignment. State the total array-level parameter count and resource usage in the table caption or a footnote.
  4. [App. C / §5.1] The per-trace vs. demux-subsample protocol changes HERQULES' F5Q by ~0.02 at 1 μs and up to ~0.09 at 200 ns. This sensitivity should be mentioned in §5.1 where HERQULES is compared against other discriminators, not only in the appendix.
  5. [General] Minor typos: 'accross' (§3), 'This complexity propagates' (abstract, capitalization after semicolon), and 'thebest routeto' (§1).

Circularity Check

0 steps flagged

No significant circularity: the paper's findings are empirical measurements, sensitivity analyses, and disclosed simulator choices, not derivations that reduce to their own inputs.

full rationale

Oraqle's central claims are empirical and simulation-based rather than derived from a first-principles chain, so the circularity patterns enumerated do not apply. The ~600 ns readout optimum is traced to the measured per-shot flip error: Appendix G removes the readout flip and all duration dependence flattens; Appendix H shows that a fixed-fidelity (duration-independent) readout removes the optimum. These ablation experiments demonstrate that the conclusion is caused by the empirical trace-derived input, not by the simulator's construction or by a normalization choice. The discriminator-complexity result is likewise an empirical comparison on a single public dataset under identical protocols, using six discriminators including models not authored by this group (HERQULES, QubiCML, KLiNQ, Baseline FNN), so the leading position of the authors' MCMit-CNN is a measured outcome, not a fitted parameter renamed as a prediction. The QEC-level simulations do rely on ECCentric, a simulator authored by this group, after a disclosed divergence from lattice-sim in Appendix F. That is a modeling and validity concern, not circularity: the paper explicitly reports the divergence, states the reason for choosing ECCentric (broader noise-model coverage), and does not cite ECCentric as an external proof of the physical conclusions. Similarly, the Lienhard dataset and MCMit references are self-authored, but they are used as data and tooling, not as load-bearing citations that replace argument. The paper's own appendices (G, H) isolate which input causes the headline effect, which is the opposite of a self-referential reduction. Accordingly, no specific equation or fitted parameter reduces to another by construction, and no self-citation is doing hidden load-bearing work in the circularity sense. The honest finding is therefore 'no significant circularity', while correctness and generalization risks from single-device data and the ECCentric/lattice-sim discrepancy remain external-validity concerns, not circularity.

Axiom & Free-Parameter Ledger

5 free parameters · 4 axioms · 0 invented entities

The central claims rest on a single device dataset, a chosen simulator, and hand-constructed future noise scenarios. No new physical entities are introduced. The free parameters are the projected noise-model coefficients, which are ad hoc but clearly disclosed. The most consequential assumption is that independent per-qubit flip errors derived from a 5-qubit device are a faithful input to QEC simulation, and that ECCentric is the correct simulator when it disagrees with lattice-sim.

free parameters (5)
  • futuristic error scaling factor = 0.1 (all gate and readout errors divided by 10)
    Chosen by hand to model projected future hardware; not derived from a physics-based scaling model.
  • futuristic coherence scaling = 3 (T1 and T2 multiplied by 3)
    Ad hoc projection of improved coherence in the futuristic noise model.
  • low-coherence model T1 = 190 microseconds
    Chosen to represent poorer-coherence hardware in the low-coherence scenario; not fitted to a specific device.
  • low-coherence model T2 = 130 microseconds
    Chosen alongside T1 to model a degraded-coherence regime.
  • decoder backlog penalty = not quantified in text
    Mentioned in Section 6.2 as a latency penalty but not specified numerically; affects the low-coherence model results.
axioms (4)
  • domain assumption Readout errors in QEC simulation are modeled as independent per-qubit flip probabilities equal to the measured per-qubit assignment fidelities.
    Used when feeding per-qubit flip-error curves into ECCentric (Section 6.1). The multiplexed dataset shows correlated readout behavior (e.g., HERQULES feature assembly in Appendix C), but correlations are not carried into the LER simulation.
  • domain assumption The five-qubit Lienhard et al. dataset is representative of superconducting qubit readout in general, so the measured fidelity-vs-duration curves generalize to other devices.
    All readout and discriminator experiments use this single dataset (Section 3.3, Stage 1); no other raw-trace dataset is public. The ~600 ns plateau and the Qubit-2 hardware wall are specific to this device.
  • domain assumption ECCentric's noise model and decoder faithfully reproduce logical error rates in the regimes studied, despite its divergence from lattice-sim.
    Main QEC results use ECCentric exclusively after it diverged from lattice-sim on the surface-CNOT test (Appendix F). The choice is justified by 'broader noise-model coverage', but the divergence itself is an unresolved modeling uncertainty.
  • ad hoc to paper Projected hardware models (errors/10 with T1/T2 tripled; T1/T2=190/130us with decoder backlog) capture plausible future device behavior.
    These scenarios are constructed by hand for the study (Section 6.3) and are not tied to a specific vendor roadmap or physics-based scaling law.

reviewed 2026-08-04 · how reviews work

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Cite this review

Pith. "Pith review of Oraqle: An Empirical Analysis of Qubit Readout and Discriminators in Quantum Error Correction." pith.science (2026). https://pith.science/paper/DO66ZUN5

@misc{pith2026260801939,
  author       = {Pith},
  title        = {Pith review of: Oraqle: An Empirical Analysis of Qubit Readout and Discriminators in Quantum Error Correction},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/DO66ZUN5}},
  note         = {Machine review of arXiv:2608.01939}
}
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read the original abstract

Quantum error correction (QEC) is the most promising route toward fault-tolerant quantum computing and, thus, useful quantum computers. QEC operates as a continuous measure-decode-correct cycle: ancilla qubits are read out, a decoder infers errors from the resulting syndromes, and corrections are applied before the next round begins. Within this loop, readout occupies a uniquely critical role, as it is the sole source of ground truth available to the decoder. Yet readout is also the slowest and most error-prone operation in the stack, with characteristics that vary across qubits and drift over time; This complexity propagates directly to the classical control hardware, and in particular to the FPGA-hosted machine-learning (ML) discriminator that must classify each analog signal into a binary syndrome outcome. Despite this central role, QEC performance has not yet been studied in depth from the perspective of readout characteristics, readout length, and their co-design with an ML discriminator. We introduce Oraqle, an end-to-end benchmarking framework that evaluates qubit-state readout and its impact on QEC performance across real experimentally extracted qubit-state-readout datasets, state-of-the-art ML discriminators, multiple QEC codes, and hardware regimes spanning current to projected devices. Our study reveals three asymmetric findings: The measurement duration can be significantly reduced with nearly no penalty to the logical error rate; The discriminator complexity barely affects the QEC performance, as residual errors are written into device physics rather than the model; and the impact of qubit-state readout on the logical error rate is conditional on where the hardware sits in the QEC landscape, a window that widens as devices mature.

Figures

Figures reproduced from arXiv: 2608.01939 by Aleksandra \'Swierkowska, Benjamin Lienhard, Emmanouil Giortamis, Felix Gust, Pramod Bhatotia, Sandra Stankovic.

Figure 1
Figure 1. Figure 1: Lifetime of a QEC-protected application. Our framework-based analysis covers the elements in [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Readout characteristics drive both the qubit-state discriminator and QEC per￾formance, and the discriminator further shapes QEC performance. Second, the complexity of the readout directly propa￾gates to the QPU control hardware ( [PITH_FULL_IMAGE:figures/full_fig_p002_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Qubit-state readout pipeline (§ 2). (a) The signal is processed before a discriminator produces a binary outcome. (b) The trace forms a 2D IQ trajectory over the measurement window. (c) An ML-based discriminator clusters the trajectories and learns a decision boundary to output the qubit state. indistinguishable from a genuine physical error on the code. QEC codes differ widely in struc￾ture, spanning topo… view at source ↗
Figure 4
Figure 4. Figure 4: Oraqle overview. Oraqle supports diverse trace analysis passes, discriminators, and QEC frameworks. simulation stage that closes the loop with logical error rates. Each stage is self-contained but de￾signed so that its outputs flow directly into the next. Stage 1 (Read): Readout characterization. Since commercial cloud providers do not release raw readout traces publicly, we conduct all readout- and discri… view at source ↗
Figure 6
Figure 6. Figure 6: Measurement duration effect on assignment fidelity (§ [PITH_FULL_IMAGE:figures/full_fig_p010_6.png] view at source ↗
Figure 5
Figure 5. Figure 5: Integrated single-shot IQ clouds for Qubit 5: [PITH_FULL_IMAGE:figures/full_fig_p010_5.png] view at source ↗
Figure 8
Figure 8. Figure 8: Read window effect on assignment fidelity (§ [PITH_FULL_IMAGE:figures/full_fig_p011_8.png] view at source ↗
Figure 7
Figure 7. Figure 7: Truncation keeps the high-information trace [PITH_FULL_IMAGE:figures/full_fig_p011_7.png] view at source ↗
Figure 9
Figure 9. Figure 9: Readout-trace preprocessing modes a discriminator can consume, ordered by the temporal infor [PITH_FULL_IMAGE:figures/full_fig_p012_9.png] view at source ↗
Figure 10
Figure 10. Figure 10: Qubit-state discriminator fidelity vs. trainable-parameter count (log scale) at [PITH_FULL_IMAGE:figures/full_fig_p014_10.png] view at source ↗
Figure 12
Figure 12. Figure 12: Per-mode error breakdown (% of shots, log scale) for HERQULES and MCMit-CNN on Q3 and Q5 [PITH_FULL_IMAGE:figures/full_fig_p015_12.png] view at source ↗
Figure 11
Figure 11. Figure 11: Single-shot error taxonomy in the integrated IQ plane (Q5): Near-boundary ambiguity is intrinsic to the cloud overlap and dominates in practice. We provide de￾tailed error taxonomy in App. E Knowing how accurate discriminators are (§5.1) is only half the picture; equally important is where they fail. Mis￾classified shots are not spread uniformly: certain physi￾cal error types systematically confuse even t… view at source ↗
Figure 13
Figure 13. Figure 13: LER vs. measurement duration at 𝑑 =5 (current noise), across four codes (§6.1). Measurement dura￾tion swings the LER by up to ∼590% (surface code); at a fixed length, discriminator choice spreads it by ∼10–39% (up to 69%). The best discriminator is always an MCMit variant, the worst QubiCML or the Linear threshold. 200 600 1000 10 0 (a) Surface 200 600 1000 (b) Bacon-shor 200 600 1000 (c) Heavy-hex 200 60… view at source ↗
Figure 14
Figure 14. Figure 14: LER vs. measurement duration at𝑑 =12 (current noise), one line per discriminator, across four codes (§6.1). Both effects vanish: the measurement-duration gap is≤6%and the discriminator spread∼2.4% (top 7.5%). All codes are saturated (surface/Bacon/heavy-hex ≈0.5, Gross ≈1.0), so the ranking flips randomly. CNOT (App. F): ECCentric has the LER saturated near 0.5 at every distance because the circuit is abo… view at source ↗
Figure 15
Figure 15. Figure 15: LER vs.measurement duration, six codes, current ibm_bostonnoise.Measurement duration matters only at small 𝑑, with a ∼600 ns plateau; larger 𝑑 saturates near 0.5 and Bacon-Shor/Gross are dead. Takeaway #6: Measurement duration leads, the discriminator follows. At small distances, measurement duration is the dominant knob (up to ∼590% LER swing), yet the discriminator still plays a clear role (up to 69%), … view at source ↗
Figure 16
Figure 16. Figure 16: LER vs. measurement duration, six codes, [PITH_FULL_IMAGE:figures/full_fig_p019_16.png] view at source ↗
Figure 17
Figure 17. Figure 17: Measurement duration is a first-class QEC knob in only one regime: a low-LER regime and a length-dependent readout. Elsewhere, it is free or irrelevant. Methodology. On the same six-code memory sweep with ECCentric and the MCMit-CNN read￾out, we evaluate two projected-hardware models: a high-fidelity readout model (readout error /10, gates and coherence at current ibm_boston) and a futur￾istic model (all … view at source ↗
Figure 18
Figure 18. Figure 18: LER vs. measurement duration, six codes, [PITH_FULL_IMAGE:figures/full_fig_p020_18.png] view at source ↗
Figure 19
Figure 19. Figure 19: LER vs. measurement duration, six codes, [PITH_FULL_IMAGE:figures/full_fig_p020_19.png] view at source ↗
Figure 20
Figure 20. Figure 20: LER (log scale) of a surface-code lattice-surgery CNOT vs. measurement duration under [PITH_FULL_IMAGE:figures/full_fig_p029_20.png] view at source ↗
Figure 21
Figure 21. Figure 21: Surface-code lattice-surgery CNOT underfuturistic noise (all errors /10,𝑇1/𝑇2 tripled), ECCentric vs. lattice-sim (lower is better). Same trend as current noise, shifted down: lattice-sim stays U-shaped and orders of magnitude lower; ECCentric plateaus beyond ∼600 ns. , Vol. 1, No. 1, Article . Publication date: August 2026 [PITH_FULL_IMAGE:figures/full_fig_p029_21.png] view at source ↗
Figure 22
Figure 22. Figure 22: LER vs. measurement duration, six codes, [PITH_FULL_IMAGE:figures/full_fig_p030_22.png] view at source ↗
Figure 23
Figure 23. Figure 23: LER vs. measurement duration, six codes, [PITH_FULL_IMAGE:figures/full_fig_p030_23.png] view at source ↗

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This paper was first reviewed by deepseek-v4-flash on August 4, 2026.