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Paper Citation Record · LEDGER

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design

As of 19 August 2026, this Paper Citation Record lists 29 of 29 outbound references and 0 inbound Pith citation observations for arXiv:2507.09965.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2507.09965 v1

Coverage vector

measured 29 of 29 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-06T17:48:53.908260Z

measured 29 of 29 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-18T06:34:40.430872+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

29 of 29 outbound references displayed

  • verified exact1
  • verified fuzzy25
  • unresolved3
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation c82d3a32-da43-41d5-9cee-3bd8dbc140aa · outbound

This paper cites Stimulus generation for constrained random simulation,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Stimulus generation for constrained random simulation,

Reference 1

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:58.208294Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:51.922840Z digest=sha256:e012be4231fbe29a0fb000374e73c188a2a749c614190435a5fb35a4e3b655cb

Observation 07de5ed3-63f1-4397-b8e6-e69b471f432b · outbound

This paper cites Au- toBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Au- toBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design,

Reference 2

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.931342Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.013275Z digest=sha256:3594788994216b42ddd7539fbbe3a2113833f5e8eac2583413a8accf560fe233

Observation 43a9214b-6a07-4bca-8141-0df76dee088b · outbound

This paper cites UVLLM: An Automated Universal RTL Verification Framework using LLMs,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design UVLLM: An Automated Universal RTL Verification Framework using LLMs,

Reference 3

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.740774Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.107163Z digest=sha256:da41d209bcd561fe83a38a485da6038f15b118287a3361639f6b3146a323196e

Observation 86d6f883-65d4-4c93-9717-9b846395f737 · outbound

This paper cites Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation | IEEE Conference Publication | IEEE Xplore.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation | IEEE Conference Publication | IEEE Xplore

Reference 4

Resolution
verified exact
raw_fallback, observed 2026-08-06T17:48:54.226732Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.186242Z digest=sha256:8f992b3ba5cf5f482436c7a16774cd3a2fecd8e5894025c47edbb1c321ad022e

Observation 96a00a75-f74f-4944-a9a2-49790a19f2da · outbound

This paper cites ChipGPT: How far are we from natural language hardware design,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design ChipGPT: How far are we from natural language hardware design,

Reference 5

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.491083Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.207939Z digest=sha256:6cdc8f893ba7cce3764362dd4953f6857448e0ba180c7e2831e2e44df0d48dc3

Observation b0daac80-61cf-412d-872c-b252dba0209d · outbound

This paper cites Chip-Chat: Chal- lenges and Opportunities in Conversational Hardware Design,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Chip-Chat: Chal- lenges and Opportunities in Conversational Hardware Design,

Reference 6

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.312121Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.253777Z digest=sha256:33b72226a48b6da1b3952556cd7fbb5f8a6b7d08c66d821a1b87be8690f3237d

Observation 6d8301cf-e6c0-450a-97bb-c76dbbc85171 · outbound

This paper cites AutoChip: Automating HDL Generation Using LLM Feedback,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design AutoChip: Automating HDL Generation Using LLM Feedback,

Reference 7

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:57.120168Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.296256Z digest=sha256:002f964a54097f1322922f536079a2d1c862c068a99e30dfc068e32f72028a27

Observation c71d55c1-d45d-4605-b72f-6413dbf21a9f · outbound

This paper cites Using LLMs to Facilitate Formal Verification of RTL.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Using LLMs to Facilitate Formal Verification of RTL

Reference 8

Resolution
unresolved
no resolver link, observed 2026-08-06T17:48:52.352163Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T17:48:52.352163Z digest=sha256:fbd2201a31a09017668df3f8c355e65ff39fce936133d266c845d87f9a2a9d1a

Observation 532e0e8f-0575-4d12-aef8-10331e0c2d13 · outbound

This paper cites LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation

Reference 9

Resolution
unresolved
no resolver link, observed 2026-08-06T17:48:52.389401Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T17:48:52.389401Z digest=sha256:b36e586666964eb842cb6c1a035af993bdbdc8546ede0836b704a624785cfe1f

Observation 19bcaf43-835a-40d0-b195-8c3026a0ce1f · outbound

This paper cites TED: A Python-Based Analog Design Environment for Agile Circuit Development,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design TED: A Python-Based Analog Design Environment for Agile Circuit Development,

Reference 10

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.851701Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.462255Z digest=sha256:4b44456d699041813e6406472a7db4bcd43d3c9129774a5d9034e792d3a4e49e

Observation 6acca702-290e-4b51-8d60-b99205b31e34 · outbound

This paper cites Evaluating Large Language Models Trained on Code,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Evaluating Large Language Models Trained on Code,

Reference 11

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.622645Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.532168Z digest=sha256:bb0c6be068841feffd69978166d565352ad95c1b121d25ccadf694d3c73f213e

Observation 78fcd3be-6cfd-42d0-975e-6d04ce7b2aeb · outbound

This paper cites Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model,

Reference 12

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.431122Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.617721Z digest=sha256:4e76b14995adf82b4d6cd4e74033c4840c1ce2bbfe72443bfe63fa311e5201ce

Observation 6669524d-36b0-4438-8716-0b934bcb95cf · outbound

This paper cites LADAC: Large Language Model- driven Auto-Designer for Analog Circuits,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design LADAC: Large Language Model- driven Auto-Designer for Analog Circuits,

Reference 13

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.310124Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.698423Z digest=sha256:81adaec4485cb0b267fb9ba9454586869671096597d48609ce0b7c3af1734f45

Observation 962858f1-3bee-495f-b32e-6e44407abd24 · outbound

This paper cites AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting,

Reference 14

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.195860Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.770610Z digest=sha256:3f8c5c84b235b9e81848d7b1f0b4b8e7c21f8977da676dff035a82b884513a7f

Observation a5f686bd-ae5e-4723-bef5-07a295b76be1 · outbound

This paper cites A Survey on Hallucination in Large Language Models: Principles, Taxonomy, Challenges, and Open Questions | ACM Transactions on Information Systems.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A Survey on Hallucination in Large Language Models: Principles, Taxonomy, Challenges, and Open Questions | ACM Transactions on Information Systems

Reference 15

Resolution
unresolved
no resolver link, observed 2026-08-06T17:48:52.857508Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T17:48:52.857508Z digest=sha256:ff7b13127b99aeb0dc24dc4ff7dc7390efe6f11ab0cdf36bde86a696249bfc9d

Observation 30a71d48-f396-444a-8dde-739d29547074 · outbound

This paper cites Analog design with verilog-a,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Analog design with verilog-a,

Reference 16

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:56.058683Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:52.950597Z digest=sha256:93e7b6c8925641fc49602d8ab56eabd41cb903aa0ff7553f1d976bbc08907543

Observation a17925a0-bae3-413e-a335-d855165c5319 · outbound

This paper cites Automated Generation Procedure for Fully Differ- ential Op-Amp Using TED,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Automated Generation Procedure for Fully Differ- ential Op-Amp Using TED,

Reference 17

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.908005Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.020617Z digest=sha256:0b153959cdaa726cea475ad3c0fffa4aa7d578ac34cea7f144d5f39f45b617c7

Observation a04a440f-9248-4216-8749-dafa7c0bc04f · outbound

This paper cites LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits,

Reference 18

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.808487Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.075066Z digest=sha256:3f61c3563b9c4b4a22110e50b25be4693dd5e89f4a9a7f959e55e4bb191048e8

Observation 487090d6-55c8-4c03-a594-9932530b0790 · outbound

This paper cites ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Models,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Models,

Reference 19

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.709019Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.152774Z digest=sha256:c87b96ac93436d89a737a001cd380b6b22029193012a5bee88fc48a961f2c928

Observation b7da624c-412d-45b1-9cfa-4dad8b5b0c7c · outbound

This paper cites Masala- chai: A large-scale spice netlist dataset for analog circuits by harnessing ai,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design Masala- chai: A large-scale spice netlist dataset for analog circuits by harnessing ai,

Reference 20

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.642234Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.207677Z digest=sha256:0fb10eb1246e2b622a255e537e488a4b24b724b52ca370b4560ef133923cad52

Observation 86080fe5-c6c2-4d10-aea6-b938076bfd50 · outbound

This paper cites OpenAI Platform.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design OpenAI Platform

Reference 21

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.573662Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.268951Z digest=sha256:5d42330d0323b995d3043d92fc66629c48e977d906b7a64ddb1e1d03b1fda9d5

Observation 2b8b8492-b3df-4f6a-8205-b5d9f815c4a0 · outbound

This paper cites An Ultra- Low-V oltage Ultra-Low-Power CMOS Miller OTA With Rail-to-Rail Input/Output Swing,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design An Ultra- Low-V oltage Ultra-Low-Power CMOS Miller OTA With Rail-to-Rail Input/Output Swing,

Reference 22

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.490828Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.354462Z digest=sha256:5d9e6166a368c158bd8179252596c379caac8e2066c47e8dccef879eca22ac3c

Observation 13d9d694-6b02-40b3-a1fa-fb0aa95c9735 · outbound

This paper cites 0.5-V operational transconductance amplifier for CMOS bandgap reference application,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design 0.5-V operational transconductance amplifier for CMOS bandgap reference application,

Reference 23

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.431182Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.463528Z digest=sha256:6305c279c5b04ced3bbae75faefaec162e4d2656f9c6926b5917731bbd22fde7

Observation cfab3fca-8594-4dad-b513-78495ea601c0 · outbound

This paper cites A Miller-compensated amplifier with Gm-boosting,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A Miller-compensated amplifier with Gm-boosting,

Reference 24

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.352534Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.562146Z digest=sha256:af63f75a2017ba2089286e927ee2dfde25986974a181a3bc9960a730b5983596

Observation 11c420d1-c6f3-4043-92a0-ce1e24f24166 · outbound

This paper cites A CMOS 25.3 ppm ◦/C bandgap voltage reference using self-cascode composite transistor,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A CMOS 25.3 ppm ◦/C bandgap voltage reference using self-cascode composite transistor,

Reference 25

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:55.152669Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.629382Z digest=sha256:2a2e076583cf40ab63fba29ad2e2641e9755fd11d6fe07de669f67b71857c776

Observation 2a9e60d0-aa91-4976-bc26-ebd662794a0e · outbound

This paper cites A low-voltage low-power voltage reference based on subthreshold MOSFETs,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A low-voltage low-power voltage reference based on subthreshold MOSFETs,

Reference 26

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:54.861284Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.693632Z digest=sha256:14da0f4118766ea941919475a2784e9e73ed7f71563896fef90c8415f4f13ed5

Observation 19c0eb34-27c9-4839-9d77-73e69d5e8a15 · outbound

This paper cites A 300 nW, 15 ppm/\circC, 20 ppm/V CMOS V oltage Reference Circuit Consisting of Subthreshold MOSFETs,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A 300 nW, 15 ppm/\circC, 20 ppm/V CMOS V oltage Reference Circuit Consisting of Subthreshold MOSFETs,

Reference 27

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:54.657059Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.752355Z digest=sha256:46145cf63bca9722f2f8489ca925e51eca014554768f24d65b6c0ad7ccbe220f

Observation f44413f2-b659-448c-9600-06a949bc9e56 · outbound

This paper cites A 65-nm CMOS Low Dropout Regulator Featuring >60-dB PSRR Over 10-MHz Frequency Range and 100-mA Load Current Range,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design A 65-nm CMOS Low Dropout Regulator Featuring >60-dB PSRR Over 10-MHz Frequency Range and 100-mA Load Current Range,

Reference 28

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:54.486533Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.829126Z digest=sha256:da6377407ac8743b0287c4d4d11c7483a6aa808d491b429b3db06bd0b79b4179

Observation d3e7519b-195e-42d9-95f0-e9816e6b2134 · outbound

This paper cites High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique,.

AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique,

Reference 29

Resolution
verified fuzzy
raw_fallback, observed 2026-08-06T17:48:54.351673Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-06T17:48:53.908260Z digest=sha256:4b55c9ceda6d32d81c9cffa27723dd512488bd69a8275d882fab9335ae715194

Pith citing papers

No inbound Pith citation observations are available.