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Cryogenic Control Architecture for Large-Scale Quantum Computing

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arxiv 1409.2202 v1 pith:ITB4AIPG submitted 2014-09-08 cond-mat.mes-hall quant-ph

classification cond-mat.mes-hallquant-ph
keywords quantumcontrolqubitsarchitecturecontrollingcryogenicacrossadvance
verification ladder T0 review T1 audit T2 compute T3 formal
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Solid-state qubits have recently advanced to the level that enables them, in-principle, to be scaled-up into fault-tolerant quantum computers. As these physical qubits continue to advance, meeting the challenge of realising a quantum machine will also require the engineering of new classical hardware and control architectures with complexity far beyond the systems used in today's few-qubit experiments. Here, we report a micro-architecture for controlling and reading out qubits during the execution of a quantum algorithm such as an error correcting code. We demonstrate the basic principles of this architecture in a configuration that distributes components of the control system across different temperature stages of a dilution refrigerator, as determined by the available cooling power. The combined setup includes a cryogenic field-programmable gate array (FPGA) controlling a switching matrix at 20 millikelvin which, in turn, manipulates a semiconductor qubit.

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