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REVIEW 2 major objections 6 minor 40 references

High yield, low disorder Si/SiGe heterostructures for spin qubit devices manufactured in a BiCMOS pilot line

T0 review · 2 major / 6 minor · reviewed 2026-08-15 · deepseek-v4-flash

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Pith's one-line read This paper claims that a 200 mm BiCMOS pilot line reproducibly yields low-disorder Si/SiGe heterostructures, with peak mobility $(4.25\pm0.17)\times10^5$ cm$^2$/Vs and percolation density $(5.9\pm0.18)\times10^{10}$ cm$^{-2}$ across six…

desk verdict Useful BiCMOS Si/SiGe process benchmark with clean transport data, but the multi-wafer statistics rest on one center device per wafer and the 'high yield' title outruns the data. read the letter →

arxiv 2506.14660 v1 pith:KX6XLMLE submitted 2025-06-17 cond-mat.mes-hall physics.app-ph

Alberto Mistroni , Marco Lisker , Yuji Yamamoto , Wei-Chen Wen , Fabian Fidorra , Henriette Tetzner , Laura K. Diebel , Lino Visser
show 8 more authors
Spandan Anupam Vincent Mourik Lars R. Schreiber Hendrik Bluhm Dominique Bougeard Marvin H. Zoellner Giovanni Capellini Felix Reichmann
This is my paper · ORCID
classification cond-mat.mes-hallphysics.app-ph
keywords Si/SiGeheterostructuresspinqubitstwo-dimensionalelectrongasmagnetotransportHallbarfield-effecttransistorBiCMOSpilotlinepercolationdensityquantumwelldisorder
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper claims that a 200 mm BiCMOS pilot line can reproducibly fabricate Si/SiGe heterostructures and gate stacks whose two-dimensional electron gases (2DEGs) are both high-quality and low-disorder, which is what scalable spin-qubit manufacturing requires. The evidence comes from Hall-bar field-effect transistors measured at 1.5 K: across six separately grown wafers, peak Hall mobility is $(4.25\pm0.17)\times10^5$ cm$^2$/Vs and the percolation density is $(5.9\pm0.18)\times10^{10}$ cm$^{-2}$, with narrow spreads of a few percent. Twelve additional devices across one wafer return similar values, supporting wafer-scale homogeneity. The authors conclude that this material and process provide a suitable platform for the development of scalable Si/SiGe-based quantum devices.

What carries the argument

The load-bearing measurement platform is the Hall-bar field-effect transistor (HB-FET): an optically patterned Hall bar with a TiN top gate and a plasma-deposited SiO$_2$ dielectric whose stack mirrors a qubit gate stack while giving direct magnetotransport access to the two-dimensional electron gas in the 8 nm Si quantum well. Three quantitative probes carry the argument: the carrier density versus gate voltage slope yields the stack capacitance and therefore dielectric and barrier thickness; the density-dependent Hall mobility ($\sigma_{xx} = ne\mu$) separates scattering regimes through the power-law exponent $\alpha$; and a fit of low-density conductivity to the percolation law $\sigma_{xx} \propto (n - n_p)^p$ with $p = 1.31$ extracts the percolation density $n_p$, a direct low-density disorder metric. These probes convert wafer-scale uniformity and run-to-run reproducibility into numbers.

What would settle it

Measure transport on a dense map of devices across whole wafers from several runs, including edge dies and multiple radii. If a significant fraction of devices shows peak mobility below the reported distribution or percolation density above roughly $1\times10^{11}$ cm$^{-2}$, the claimed wafer-scale homogeneity and run-to-run reproducibility would be refuted.

Watch

Extended reading notes

Core claim

The central discovery is that an industry-standard 200 mm BiCMOS pilot line produces shallow undoped Si/SiGe quantum wells whose transport properties are both high and tightly distributed. Across wafers A to F the maximum Hall mobility averages $(4.25\pm0.17)\times10^5$ cm$^2$/Vs, and across one wafer it averages $(4.20\pm0.28)\times10^5$ cm$^2$/Vs; the percolation densities are $(5.9\pm0.18)\times10^{10}$ cm$^{-2}$ and $(6.24\pm0.33)\times10^{10}$ cm$^{-2}$, respectively. The authors interpret the low-density mobility rise ($\alpha\approx2.47$) as remote-impurity Coulomb scattering and the low percolation threshold as evidence of a low-disorder landscape in the quantum well, comparable to or better than state-of-the-art field-effect stacks used for quantum devices. Structural imaging supports the electrical picture: no residual Si cap, no significant Ge pile-up at the gate interface, abrupt quantum-well interfaces, and the expected $1.29\%$ tensile strain in the Si channel.

Load-bearing premise

The claim of reproducibility and uniformity rests on assuming that one device from the center of each of six wafers, plus twelve devices from one wafer, represent the full wafers; if defective or nonuniform regions fell outside those probed spots, the narrow reported distributions would overstate process stability.

Editorial extensions

If this is right

  • Across multiple fabrication runs a single 200 mm line can deliver peak 2DEG mobility above $4\times10^5$ cm$^2$/Vs, matching the best field-effect stacks reported for quantum devices.
  • Percolation densities near $6\times10^{10}$ cm$^{-2}$ mean the quantum well stays low-disorder at the low carrier densities where gate-defined quantum dots are operated.
  • The few-percent spread in capacitance, mobility, and percolation density across a wafer means many nominally identical qubit devices can be made side by side, a prerequisite for high-yield processor fabrication.
  • Because the growth chemistry is standard silane and germane reduced-pressure CVD, the same process can be applied to isotopically purified $^{28}$Si to obtain nuclear-spin-free heterostructures for long-coherence qubits.
  • The gate-stack characterization shows the sacrificial Si cap is fully consumed without leaving Ge pile-up, removing a known source of disorder at the dielectric interface.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Editorial inference: the single edge-device outlier with suppressed peak mobility hints that practical yield could be increased by excluding the wafer edge, but the sparse sampling cannot establish an edge-exclusion rule.
  • Editorial inference: transport metrics are proxies; the decisive follow-up is to build quantum dots on these wafers and measure charge noise, valley splitting, and single-electron operation directly.
  • Editorial inference: the observed saturation of carrier density at high gate voltage, attributed to electrons tunneling into dielectric-interface traps, may cap the usable density range for devices; whether this limits qubit operation is not addressed here.
  • Editorial inference: a direct next experiment is growing the same stack with an isotopically enriched $^{28}$Si quantum well and checking that mobility and percolation density survive the isotope switch, as the authors expect from the growth chemistry.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

2 major / 6 minor

Summary. This manuscript reports magnetotransport characterization of Hall-bar field-effect transistors fabricated on Si/SiGe heterostructures grown in a 200 mm BiCMOS pilot line. The authors measure carrier density, Hall mobility, and percolation density at 1.5 K for one center device from each of six nominally identical wafers and for 12 additional devices across one wafer (wafer A). They report an average peak mobility of (4.25±0.17)×10^5 cm^2/Vs and a percolation density of (5.9±0.18)×10^10 cm^-2 across the six wafers, with similar wafer-scale values, and conclude that the process yields low-disorder, homogeneous heterostructures suitable for scalable spin-qubit devices. Structural characterization (STEM/EDX, XRD) is used to support layer thickness, interface sharpness, and strain claims.

Significance. If the reported uniformity and reproducibility hold, the paper demonstrates that an industry-standard BiCMOS pilot line can produce Si/SiGe field-effect stacks with transport properties comparable to or better than current state-of-the-art qubit-compatible stacks, which is an important step for scalable spin qubit manufacturing. Strengths of the work include the use of standard transport formulas with an externally sourced percolation exponent (p = 1.31), cross-laboratory validation of two devices, and quantitative structural analysis (interface widths from STEM, strain from XRD). The main caveat is that the central reproducibility claim rests on a small, center-selected sample, with an acknowledged edge outlier on wafer A that is not sampled on the other wafers.

major comments (2)
  1. [Magnetotransport characterization and Fig. 2] The wafer-to-wafer reproducibility claim is built on one center-selected device per wafer (wafers A–F, six devices total), while the wafer-scale study of wafer A includes a near-edge device whose peak mobility and high-density exponent (alpha = -0.6) lie far outside the reported standard deviations. Because no edge or near-edge devices were measured on wafers B–F, the quoted wafer-to-wafer averages (mu = (4.25±0.17)×10^5 cm^2/Vs, n_p = (5.9±0.18)×10^10 cm^-2) may systematically exclude the kind of degradation that the edge outlier reveals. The conclusion of 'homogeneous' wafer-scale performance is therefore stronger than the data support; the authors should either present edge-location measurements from multiple wafers or explicitly restrict the uniformity claim to the central wafer area.
  2. [Title, abstract, and conclusion] The title and concluding section claim 'high yield,' but the manuscript contains no yield statistics: no definition of a working device, no pass/fail criterion, and no fraction of devices meeting a performance specification. The reported averages are computed from a small, selected set of devices (one center device per wafer for six wafers, plus 12 devices on one wafer). To support the 'high yield' claim, the authors need to provide yield data or at least a clear statement of the selection procedure; otherwise the claim should be removed or qualified.
minor comments (6)
  1. [Fig. 2c paragraph] The text contains a duplicated word: 'If if we consider local-field corrections' should read 'If we consider local-field corrections.'
  2. [Fig. 1 caption] The abbreviation 'HADDF' in the Fig. 1 caption should be 'HAADF' to match the high-angle annular dark-field terminology used in the main text.
  3. [Quantum well interface width, Fig. 1d] The top interface width is reported as 4*tau_top = 0.79 nm while the bottom is reported as tau_bot = 1.04 nm; please clarify whether the 4*tau parameter was applied consistently and state the definition for each interface.
  4. [Transport extraction methods] Please specify the magnetic-field range and the B->0 extrapolation procedure used to extract mobility from rho_xx and rho_xy, and define n_min in the percolation fitting range (n_min <= n_range <= 1.2×10^11 cm^-2).
  5. [Figure 2b and capacitance statistics] The caption states that the red dashed line is a linear fit to the mean trend; please clarify whether the reported capacitance statistics come from fits to individual devices or from fits to the mean curve.
  6. [Affiliation and references] There are minor typographical issues: 'F orschungszentrum' should be 'Forschungszentrum', the license should be identified accurately as CC BY-NC-SA 4.0, and reference groupings such as '192' and '23171926' should be formatted as separate citations.

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: transport parameters are extracted with standard formulas and external percolation exponents, with self-citations used only as baseline and process references.

full rationale

The derivation chain is self-contained. Carrier density n is obtained from the standard Hall relation ρxy = B⊥/(e n) and mobility from σxx = n e μ (section on magnetotransport characterization and Fig. 2c), with no target transport quantity used as an input. The percolation density is extracted by fitting σxx ∝ (n − np)^p with p = 1.31 taken from Tracy et al. [35], an external literature value, so the fit parameter np is not preset by the paper's own claims. Capacitance is checked against a geometric estimate from STEM thicknesses with standard dielectric constants, agreeing to within 1%, which is an independent consistency check rather than a circular reuse of the result. Comparisons of mobility and percolation density are made against external benchmarks (e.g., refs. 17, 19, 26). Self-citations appear only as process-description references ([20], [18]) and as a baseline for improvement ('substantial improvement to our previous work [20]'); none of these citations is used to forbid alternatives or to define the target quantities. The reader-identified sampling limitation—one center device per wafer for wafers B–F and one edge outlier in wafer A—is a statistical representativeness concern, not a circularity: it affects how broadly the wafer-to-wafer uniformity claim generalizes but does not make any extracted value depend on the conclusion. No fitted parameter is renamed as a prediction, and no result is assumed in its own derivation. The title's 'high yield' wording is unsupported by yield statistics, but that is a correctness or evidence concern, not circularity.

Assumptions & free parameters 3 free parameters · 5 assumptions · 0 invented entities

The central quantities are measured with standard transport relations. The only model assumptions are the percolation form with a literature exponent and a parallel-plate capacitance model. No new entity or ad hoc physical parameter is introduced. Fitted exponents describe scattering regimes and are not load-bearing.

free parameters (3)
  • Low-density power-law exponent alpha = 2.47 (median)
    Exponent in the n ~ mu^alpha fit used to characterize the scattering regime; descriptive and not load-bearing for the main reproducibility claim.
  • High-density power-law exponent alpha = -0.12 (median)
    Exponent for the high-density mobility regime; descriptive only.
  • STEM interface-width sigmoid parameters = 4 tau_top = 0.79 nm, tau_bot = 1.04 nm
    Parameters from sigmoid fits to STEM intensity profiles; structural descriptors not used in the transport claim.
assumptions (5)
  • standard math 2DEG transport formulas rho_xy = B/(e n) and sigma_xx = n e mu
    Used to convert measured resistivities into carrier density and mobility; standard single-band Hall and Drude relations.
  • domain assumption Percolation conductivity model sigma_xx proportional to (n - np)^p with p = 1.31
    Assumed to extrapolate low-density conductivity to a percolation threshold; exponent taken from Tracy et al. 2009, not derived here.
  • domain assumption Parallel-plate capacitor model for gate-induced density
    Used to interpret the linear n(VG) region and derive capacitance; assumes ideal series dielectrics and no leakage.
  • domain assumption Hall bar 2DEG transport is a proxy for disorder relevant to spin qubit devices
    Underlies the concluding suitability-for-qubits claim; qubit-specific factors such as valley splitting and charge noise are not measured.
  • domain assumption Single 2DEG channel with negligible parallel conduction
    Magnetotransport data are interpreted as originating from a single occupied quantum well subband; no multi-carrier analysis is presented.

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Cite this review

Pith. "Pith review of High yield, low disorder Si/SiGe heterostructures for spin qubit devices manufactured in a BiCMOS pilot line." pith.science (2026). https://pith.science/paper/KX6XLMLE

@misc{pith2026250614660,
  author       = {Pith},
  title        = {Pith review of: High yield, low disorder Si/SiGe heterostructures for spin qubit devices manufactured in a BiCMOS pilot line},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/KX6XLMLE}},
  note         = {Machine review of arXiv:2506.14660}
}
abstract

The prospect of achieving fault-tolerant quantum computing with semiconductor spin qubits in Si/SiGe heterostructures relies on the integration of a large number of identical devices, a feat achievable through a scalable (Bi)CMOS manufacturing approach. To this end, both the gate stack and the Si/SiGe heterostructure must be of high quality, exhibiting uniformity across the wafer and consistent performance across multiple fabrication runs. Here, we report a comprehensive investigation of Si/SiGe heterostructures and gate stacks, fabricated in an industry-standard 200 mm BiCMOS pilot line. We evaluate the homogeneity and reproducibility by probing the properties of the two-dimensional electron gas (2DEG) in the shallow silicon quantum well through magnetotransport characterization of Hall bar-shaped field-effect transistors at 1.5 K. Across all the probed wafers, we observe minimal variation of the 2DEG properties, with an average maximum mobility of $(4.25\pm0.17)\times 10^{5}$ cm$^{2}$/Vs and low percolation carrier density of $(5.9\pm0.18)\times 10^{10}$ cm$^{-2}$ evidencing low disorder potential in the quantum well. The observed narrow statistical distribution of the transport properties highlights the reproducibility and the stability of the fabrication process. Furthermore, wafer-scale characterization of a selected individual wafer evidenced the homogeneity of the device performances across the wafer area. Based on these findings, we conclude that our material and processes provide a suitable platform for the development of scalable, Si/SiGe-based quantum devices.

Figures

Figures reproduced from arXiv: 2506.14660 by the authors.

Figure 1
Figure 1. FIG. 1. (a) Schematic of the Si/SiGe heterostructure with fabricated HB-FET device, including the layer [PITH_FULL_IMAGE:figures/full_fig_p004_1.png] view at source ↗
Figure 2
Figure 2. FIG. 2. Magnetotransport characterization at 1.5 K. The upper panel corresponds to the wafer-to-wafer [PITH_FULL_IMAGE:figures/full_fig_p007_2.png] view at source ↗

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