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ChipXplore: Natural Language Exploration of Hardware Designs and Libraries

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arxiv 2407.12749 v3 pith:MQ4SURCC submitted 2024-07-17 cs.CL

ChipXplore: Natural Language Exploration of Hardware Designs and Libraries

classification cs.CL
keywords designchipxplorehardwarelanguagenaturalworkflowsaccuracycapable
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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Hardware design workflows rely on Process Design Kits (PDKs) from different fabrication nodes, each containing standard cell libraries optimized for speed, power, or density. Engineers typically navigate between the design and target PDK to make informed decisions, such as selecting gates for area optimization or enhancing the speed of the critical path. However, this process is often manual, time-consuming, and prone to errors. To address this, we present ChipXplore, a multi-agent collaborative framework powered by large language models that enables engineers to query hardware designs and PDKs using natural language. By exploiting the structured nature of PDK and hardware design data, ChipXplore retrieves relevant information through text-to-SQL and text-to-Cypher customized workflows. The framework achieves an execution accuracy of 97.39\% in complex natural language queries and improves productivity by making retrieval 5.63x faster while reducing errors by 5.25x in user studies. Compared to generic workflows, ChipXplore's customized workflow is capable of orchestrating reasoning and planning over multiple databases, improving accuracy by 29.78\%. ChipXplore lays the foundation for building autonomous agents capable of tackling diverse physical design tasks that require PDK and hardware design awareness.

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