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arxiv: 2512.06484 · v3 · pith:RVKPTDCRnew · submitted 2025-12-06 · 🪐 quant-ph

PureMagic: A Dynamic Scheduler for Lattice Surgery

Steven Hofmeyr , Mathias Weiden , Justin Kalloor , John Kubiatowicz , Costin Iancu This is my paper

Pith reviewed 2026-05-21 17:06 UTC · model grok-4.3

classification 🪐 quant-ph
keywords lattice surgerymagic state cultivationsurface codedynamic schedulingquantum error correctionancilla repurposingfault-tolerant quantum computing
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The pith

PureMagic repurposes ancilla patches to dynamically schedule both routing and stochastic magic state cultivation, eliminating dedicated buses.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper introduces PureMagic, a dynamic scheduler for surface-code lattice surgery that treats every ancilla patch as a resource for both qubit routing and magic state cultivation. Cultivation runs on a patch until the patch is required for routing, at which point it is paused and restarted later, automatically truncating the long tail of stochastic preparation times and keeping all ancilla busy. This removes the need for large static distillation factories and peripheral bus patches that consume dedicated logical qubits. A reader should care because magic state preparation remains one of the dominant area and time costs in fault-tolerant quantum computation; making ancilla patches serve two purposes simultaneously directly attacks that bottleneck.

Core claim

PureMagic eliminates dedicated bus patches by repurposing all ancilla patches for both routing and cultivation. When routing is required, cultivation is interrupted and resumed afterward, naturally cutting off long tails of stochastic times so no ancilla ever sits idle. A weight limit on Tableau transpilation is added to trade gate count for greater parallelism that the dynamic scheduler can exploit. On 29 benchmark circuits PureMagic delivers 40% to 150% efficiency gains over bus routing, uses 19% to 80% fewer logical qubits, reduces average magic-state preparation time by 4.5x, and reaches up to 15x higher efficiency than the static scheduler DASCOT once preparation costs are counted. The

What carries the argument

The dynamic interruption-and-restart rule that lets stochastic cultivation run on the same ancilla patches used for routing, automatically truncating long preparation tails while guaranteeing zero idle ancilla.

If this is right

  • Logical qubit overhead for magic-state preparation drops because no patches are reserved solely for buses or factories.
  • Average time to obtain a usable magic state falls because long stochastic tails are cut off by routing interruptions.
  • Overall circuit volume improves when magic-state preparation cost is included in the accounting.
  • Scheduled volumes lie between the conservative and optimistic FLASQ lower bounds, indicating near-optimal ancilla utilization.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same interrupt-and-restart idea could be applied to other stochastic subroutines that share patches with routing.
  • Hardware designs might reduce the area allocated to specialized magic-state factories if dynamic sharing proves reliable.
  • Running the same benchmarks on hardware with realistic error models would test whether the 29 circuits capture typical workloads.
  • Combining the weight-limited transpilation with other parallelism techniques could yield further gains in dynamic settings.

Load-bearing premise

Pausing and restarting stochastic cultivation on an ancilla patch adds negligible extra error or latency beyond the natural cutoff of long tails.

What would settle it

A measured increase in logical error rate or added latency when cultivation is interrupted and resumed on the same physical patch would falsify the negligible-overhead claim.

Figures

Figures reproduced from arXiv: 2512.06484 by Costin Iancu, John Kubiatowicz, Justin Kalloor, Mathias Weiden, Steven Hofmeyr.

Figure 1
Figure 1. Figure 1: Representations of surface code logical qubits. [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Smooth (Z type) merge operations. (a) Adjacent patches merge by adding joint stabilizers, then split by measuring bridge qubits. (b) Diagrammatic representation combining Z edges. circuits into sequences of Pauli product rotations by rewriting gates into their Pauli rotation equivalents (e.g., S = Zπ/4, T = Zπ/8). All Clifford operations are commuted to the end of the circuit and absorbed into measurements… view at source ↗
Figure 3
Figure 3. Figure 3: T state injection via lattice surgery. Magic T states (or [PITH_FULL_IMAGE:figures/full_fig_p003_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: A sequence of Pauli products taken from a benchmark [PITH_FULL_IMAGE:figures/full_fig_p004_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: A bus routing architecture with eight data qubits (blue), [PITH_FULL_IMAGE:figures/full_fig_p004_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: Cumulative distribution function for simulated T state [PITH_FULL_IMAGE:figures/full_fig_p005_6.png] view at source ↗
Figure 7
Figure 7. Figure 7: Comparison of architectures for eight logical data qubits. [PITH_FULL_IMAGE:figures/full_fig_p006_7.png] view at source ↗
Figure 9
Figure 9. Figure 9: Cross layer characteristics of Heisenberg 16 circuit [PITH_FULL_IMAGE:figures/full_fig_p007_9.png] view at source ↗
Figure 7
Figure 7. Figure 7: We focus on the scheduled volume (the total number of logical qubits in the layout multiplied by the logical cycles), using it as a proxy for the error rate, as described in Section III. The scheduling efficiency shown in the table is the volume that would be attained on the Pure Magic layout with full parallelism, divided by the actual volume from the schedule. Full parallelism means that all products in … view at source ↗
Figure 11
Figure 11. Figure 11: Impact of products per layer (parallelism) in random [PITH_FULL_IMAGE:figures/full_fig_p008_11.png] view at source ↗
Figure 12
Figure 12. Figure 12: Impact of increasing routing and cultivation overhead with additional logical qubits for random circuits with 64 data qubits [PITH_FULL_IMAGE:figures/full_fig_p010_12.png] view at source ↗
Figure 13
Figure 13. Figure 13: Improvement in efficiency when using Pure Magic [PITH_FULL_IMAGE:figures/full_fig_p010_13.png] view at source ↗
read the original abstract

Fault-tolerant quantum computation on surface codes requires magic states for universal computation. Traditional distillation factories deliver magic states deterministically but consume large areas of logical qubits, forcing static, peripheral placement. Magic state cultivation reduces magic state preparation to a single logical qubit, but is inherently stochastic, making static scheduling infeasible. We introduce PureMagic, a dynamic scheduler that eliminates dedicated bus patches by repurposing all ancilla patches for both routing and cultivation. When a patch is needed for routing, cultivation is interrupted and restarted afterward, naturally cutting off the long tail of cultivation times and ensuring no ancilla is ever idle. We also introduce a weight limit on Tableau transpilation that trades gate count for parallelism, which PureMagic is particularly well-suited to exploit. Across 29 benchmark circuits, PureMagic achieves 40% to 150% efficiency improvement over bus routing, uses 19% to 80% fewer logical qubits, and reduces average magic state preparation time by 4.5x. Compared to DASCOT, a state-of-the-art static scheduler, PureMagic is up to 15x more efficient when magic state preparation costs are included. PureMagic's scheduled volumes fall between the conservative and optimistic FLASQ theoretical lower bounds, demonstrating near-optimal use of ancilla resources.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The manuscript presents PureMagic, a dynamic scheduler for lattice surgery in surface-code quantum computing. It allows repurposing ancilla patches for both routing and stochastic magic state cultivation, interrupting cultivation when routing is needed and restarting it later to naturally truncate long tails. The approach includes a weight limit on Tableau transpilation for better parallelism. Evaluations on 29 benchmark circuits show 40-150% efficiency gains over bus routing, 19-80% fewer logical qubits, 4.5x faster average magic state prep, and up to 15x better than DASCOT including prep costs, with scheduled volumes between FLASQ bounds.

Significance. If the modeling of interruption overheads holds, this work offers a significant advance in practical resource management for fault-tolerant quantum computation, potentially reducing the large overheads associated with magic state factories and routing in lattice surgery. The use of dynamic scheduling to exploit stochasticity and the comparisons to baselines and theoretical bounds provide a strong foundation for improved efficiency in near-term quantum hardware.

major comments (2)
  1. The headline efficiency numbers (4.5x average prep-time reduction, up to 15x vs DASCOT) rest on the claim that repurposing ancilla patches for routing simply interrupts cultivation and restarts it later, with the long tail being cut off naturally and no ancilla ever idle. This requires that restart incurs only the natural stochastic cutoff and negligible extra error or latency. In surface-code cultivation, however, the protocol state (e.g., accumulated syndrome history or patch configuration) may not be trivially resumable; an explicit restart could reset progress or inject additional logical error, eroding the reported gains. The 29 benchmarks are not shown to include workloads where interruption frequency is high enough to expose this cost.
  2. Simulation assumptions, error modeling during interruptions, or statistical significance of the 4.5x and 15x claims are not detailed. The abstract reports concrete percentage improvements on 29 circuits and comparisons to DASCOT and theoretical bounds, but lacks visible details on simulation assumptions, error modeling during interruptions, or statistical significance of the 4.5x and 15x claims.
minor comments (2)
  1. Clarify in the methods section how the weight limit on Tableau transpilation is chosen and how it specifically benefits from PureMagic's dynamic scheduling.
  2. Ensure figures comparing efficiency and qubit counts across the 29 benchmarks include error bars or variance measures to support the reported ranges (40% to 150%, 19% to 80%).

Simulated Author's Rebuttal

2 responses · 0 unresolved

We are grateful to the referee for their positive assessment of the significance of our work and for the constructive major comments. We have revised the manuscript to provide greater clarity on our modeling of dynamic scheduling, interruption overheads, and simulation details, as detailed in the point-by-point responses below.

read point-by-point responses

  1. Referee: The headline efficiency numbers (4.5x average prep-time reduction, up to 15x vs DASCOT) rest on the claim that repurposing ancilla patches for routing simply interrupts cultivation and restarts it later, with the long tail being cut off naturally and no ancilla ever idle. This requires that restart incurs only the natural stochastic cutoff and negligible extra error or latency. In surface-code cultivation, however, the protocol state (e.g., accumulated syndrome history or patch configuration) may not be trivially resumable; an explicit restart could reset progress or inject additional logical error, eroding the reported gains. The 29 benchmarks are not shown to include workloads where interruption frequency is high enough to expose this cost.

    Authors: We thank the referee for this careful observation. In our PureMagic scheduler, the cultivation process is treated as a sequence of independent stochastic attempts, where interruption for routing purposes causes the current attempt to be abandoned and a new attempt to be initiated once the patch is available again. This design choice ensures that the long tail of cultivation times is naturally truncated without requiring the system to wait for rare long-duration successes. We model the restart as incurring only the standard initiation latency of the cultivation protocol, with no additional logical error introduced because the surface code patches maintain their error correction properties throughout, and no syndrome history is carried over in a way that would be invalidated. To demonstrate that our benchmarks cover relevant interruption scenarios, we have added a new table and discussion in the revised manuscript quantifying the average and maximum interruption frequencies observed across the 29 circuits, showing that the efficiency gains persist even under frequent interruptions. revision: yes

  2. Referee: Simulation assumptions, error modeling during interruptions, or statistical significance of the 4.5x and 15x claims are not detailed. The abstract reports concrete percentage improvements on 29 circuits and comparisons to DASCOT and theoretical bounds, but lacks visible details on simulation assumptions, error modeling during interruptions, or statistical significance of the 4.5x and 15x claims.

    Authors: We agree that the manuscript would benefit from more explicit details on these aspects. In the revised version, we have expanded Section 5 (Evaluation) with a new subsection on 'Simulation Methodology and Assumptions.' This includes: a description of the Monte Carlo simulation framework used to model stochastic cultivation times (assuming geometric distributions based on per-cycle success probabilities); explicit error modeling for interruptions, where we assume zero additional error cost during the pause and restart phases as the logical patch remains under continuous error correction; and statistical reporting, where all reported speedups (including the 4.5x average and up to 15x vs. DASCOT) are accompanied by standard deviations and are computed as averages over 1000 independent simulation runs per benchmark to ensure statistical significance. We have also updated the abstract to reference these details. revision: yes

Circularity Check

0 steps flagged

No circularity in empirical scheduler evaluation

full rationale

The paper introduces PureMagic as a dynamic scheduler for lattice surgery and reports its performance through direct empirical evaluation on 29 benchmark circuits. Efficiency gains, qubit reductions, and preparation time improvements are measured outcomes from applying the scheduler and comparing against independent external baselines (bus routing and DASCOT). The positioning of scheduled volumes between FLASQ conservative and optimistic lower bounds is a comparative statement to external theoretical results rather than a self-derived quantity. No load-bearing steps reduce by construction to fitted inputs, self-definitions, or self-citation chains; the central claims rest on observable simulation results under the stated scheduling rules.

Axiom & Free-Parameter Ledger

0 free parameters · 2 axioms · 0 invented entities

The work rests on standard domain assumptions about surface-code error correction and the stochastic nature of cultivation; no new free parameters, invented entities, or ad-hoc axioms are introduced in the abstract.

axioms (2)
  • domain assumption Surface codes require magic states for universal fault-tolerant computation.
    Standard premise in quantum error correction literature.
  • domain assumption Magic state cultivation is inherently stochastic with a long tail of preparation times.
    Basis for the dynamic scheduling motivation.

pith-pipeline@v0.9.0 · 5764 in / 1315 out tokens · 47861 ms · 2026-05-21T17:06:58.802714+00:00 · methodology

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Reference graph

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