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SPulseGen: Succinct pulse generator architecture maximizing gate fidelity for superconducting quantum computers

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arxiv 2312.08699 v2 pith:SPSCMQBJ submitted 2023-12-14 quant-ph

SPulseGen: Succinct pulse generator architecture maximizing gate fidelity for superconducting quantum computers

classification quant-ph
keywords pulsegeneratorarchitecturefidelitygatequantumqubitswaveform
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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This paper proposes a cost-effective architecture for an RF pulse generator for superconducting qubits. Most existing works use arbitrary waveform generators (AWGs) that require both a large amount of high-bandwidth memories and high-performance analog circuits to achieve the highest gate fidelity with an optimized RF pulse waveform. The proposed pulse generator architecture significantly simplifies both the generator circuit and the waveform of the RF pulse to a cost-aware square pulses. This architecture eliminates the requirement for power- and cost-intensive AWG, a major obstacle in realizing scalable quantum computers. Additionally, this paper proposes a process to optimize pulse waveforms to maximize fidelity of gate operations for single and multiple qubits. Quantum dynamics simulation of transmon qubits, wherein the state of system evolves with time, demonstrates that our pulse generator can achieve practically the same gate fidelity as ideal RF pulses, while substantially reducing the performance requirements of memory and analog circuits.

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