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Gate Stack Dielectric Degradation of Rare-Earth Oxides Grown on High Mobility Ge Substrates

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arxiv 1206.1887 v2 pith:THY7TST4 submitted 2012-06-08 cond-mat.mtrl-sci physics.soc-ph

classification cond-mat.mtrl-sciphysics.soc-ph
keywords devicesdegradationdielectrichighmobilitysubstrateschargecurrent
verification ladder T0 review T1 audit T2 compute T3 formal
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We report on the dielectric degradation of Rare-Earth Oxides (REOs), when used as interfacial buffer layers together with HfO2 high-k films (REOs/HfO2) on high mobility Ge substrates. Metal-Oxide-Semiconductor (MOS) devices with these stacks,show dissimilar charge trapping phenomena under varying levels of Constant- Voltage-Stress (CVS) conditions, which also influences the measured densities of the interface (Nit) and border (NBT) traps. In the present study we also report on C-Vg hysteresis curves related to Nit and NBT. We also propose a new model based on Maxwell-Wagner instabilities mechanism that explains the dielectric degradations (current decay transient behavior) of the gate stack devices grown on high mobility substrates under CVS bias from low to higher fields, and which is unlike to those used for other MOS devices. Finally, the time dependent degradation of the corresponding devices revealed an initial current decay due to relaxation, followed by charge trapping and generation of stress-induced leakage which eventually lead to hard breakdown after long CVS stressing.

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