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arxiv: 2407.08608 · v2 · pith:UQKLUT5O · submitted 2024-07-11 · cs.LG · cs.AI

FlashAttention-3: Fast and Accurate Attention with Asynchrony and Low-precision

Jay Shah , Ganesh Bikshandi , Ying Zhang , Vijay Thakkar , Pradeep Ramani , Tri Dao This is my paper

Reviewed by Pith2026-05-20 19:39 UTCgrok-4.3pith:UQKLUT5Oopen to challenge →

classification cs.LG cs.AI
keywords FlashAttentionattention mechanismGPU optimizationHopper architectureFP8 low precisionasynchronywarp specializationTransformer
0
0 comments X

The pith

FlashAttention-3 achieves 1.5-2x faster attention on H100 GPUs by exploiting asynchrony and FP8 precision.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

This paper introduces FlashAttention-3 to accelerate the attention layer that bottlenecks Transformer models on recent NVIDIA Hopper GPUs. The authors combine warp specialization to overlap computation with data movement, interleave matrix multiplications and softmax steps at the block level, and add block quantization plus incoherent processing to use FP8 low precision. These changes raise utilization to 75 percent in FP16 and push FP8 throughput near 1.2 petaflops per second while cutting numerical error by a factor of 2.6 relative to ordinary FP8 attention. A reader would care because attention speed directly limits how large or long-context a model can be trained or run on a given GPU.

Core claim

We develop three main techniques to speed up attention on Hopper GPUs: exploiting asynchrony of the Tensor Cores and TMA to overlap overall computation and data movement via warp-specialization and interleave block-wise matmul and softmax operations, and block quantization and incoherent processing that leverages hardware support for FP8 low-precision. FlashAttention-3 achieves speedup on H100 GPUs by 1.5-2.0× with FP16 reaching up to 740 TFLOPs/s (75% utilization), and with FP8 reaching close to 1.2 PFLOPs/s. We validate that FP8 FlashAttention-3 achieves 2.6× lower numerical error than a baseline FP8 attention.

What carries the argument

Warp specialization to overlap Tensor Core computation with TMA data movement, block-level interleaving of matmul and softmax, and block quantization with incoherent processing to support FP8 arithmetic.

If this is right

  • Attention no longer limits throughput as severely for long-context or large-batch Transformer workloads on Hopper hardware.
  • FP8 attention can sustain nearly 1.2 PFLOPs/s while preserving higher accuracy than prior low-precision baselines.
  • Overall training and inference time for models that use attention drops by 1.5 to 2 times on the same GPU.
  • Higher compute utilization (up to 75 percent) becomes reachable without changing model architecture.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same overlap and quantization ideas could be applied to other memory-bound operations such as feed-forward layers.
  • Hardware vendors might expose similar asynchronous primitives on future chips, allowing these speedups to generalize beyond Hopper.
  • Incoherent block processing may extend to even lower precisions such as FP4 if hardware support appears.

Load-bearing premise

The asynchronous execution model of Tensor Cores and TMA on Hopper GPUs can be safely exploited through warp specialization and interleaving without synchronization bugs or incorrect attention outputs.

What would settle it

Run FlashAttention-3 on an H100 GPU, record measured TFLOPs/s in FP16 and FP8 modes, and compare the numerical error of the FP8 output against a standard FP8 attention implementation to check if the claimed 2.6× error reduction appears.

read the original abstract

Attention, as a core layer of the ubiquitous Transformer architecture, is the bottleneck for large language models and long-context applications. FlashAttention elaborated an approach to speed up attention on GPUs through minimizing memory reads/writes. However, it has yet to take advantage of new capabilities present in recent hardware, with FlashAttention-2 achieving only 35% utilization on the H100 GPU. We develop three main techniques to speed up attention on Hopper GPUs: exploiting asynchrony of the Tensor Cores and TMA to (1) overlap overall computation and data movement via warp-specialization and (2) interleave block-wise matmul and softmax operations, and (3) block quantization and incoherent processing that leverages hardware support for FP8 low-precision. We demonstrate that our method, FlashAttention-3, achieves speedup on H100 GPUs by 1.5-2.0$\times$ with FP16 reaching up to 740 TFLOPs/s (75% utilization), and with FP8 reaching close to 1.2 PFLOPs/s. We validate that FP8 FlashAttention-3 achieves 2.6$\times$ lower numerical error than a baseline FP8 attention.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

1 major / 2 minor

Summary. This paper proposes FlashAttention-3, an attention algorithm optimized for Hopper GPUs. It uses three techniques: warp specialization to overlap computation and data movement by exploiting asynchrony between Tensor Cores and TMA, interleaving of matmul and softmax operations, and block FP8 quantization with incoherent processing. The authors report achieving 1.5-2.0× speedups, with FP16 performance up to 740 TFLOPs/s at 75% utilization and FP8 up to 1.2 PFLOPs/s, and 2.6× lower numerical error than baseline FP8 attention.

Significance. The results, if they hold, would be significant for improving the efficiency of Transformer models on cutting-edge hardware. By increasing GPU utilization for attention to 75% and demonstrating benefits of low-precision with reduced error, this work addresses a key bottleneck in scaling LLMs. Credit is due for the direct empirical validation on H100 hardware without reliance on any free parameters or circular reasoning.

major comments (1)
  1. §5 (Experimental Results): While concrete TFLOPs/s and error numbers are reported, the section does not provide error bars, detailed benchmark setup including sequence lengths tested, or rules for data exclusion, making it difficult to verify the claimed speedups and error reductions.
minor comments (2)
  1. Abstract: It would be clearer to report the utilization percentage for FP8 as well, for consistency with the FP16 case.
  2. Related Work: Ensure all prior FlashAttention papers are cited with their specific utilization numbers for context.

Simulated Author's Rebuttal

1 responses · 0 unresolved

We thank the referee for the constructive feedback and the recommendation for minor revision. We address the single major comment below and will incorporate the suggested improvements into the revised manuscript.

read point-by-point responses

  1. Referee: §5 (Experimental Results): While concrete TFLOPs/s and error numbers are reported, the section does not provide error bars, detailed benchmark setup including sequence lengths tested, or rules for data exclusion, making it difficult to verify the claimed speedups and error reductions.

    Authors: We agree that additional details would strengthen reproducibility. In the revised Section 5, we will add error bars to all reported TFLOPs/s and numerical error figures, computed over at least five independent runs with different random seeds. We will expand the benchmark description to explicitly list the sequence lengths evaluated (512 to 131072 tokens), batch sizes, head dimensions, and the precise H100 GPU configuration (including CUDA version and PyTorch version). We will also state that no measurements were excluded; all collected data points are reported without selective omission. These changes address the verification concern directly. revision: yes

Circularity Check

0 steps flagged

No significant circularity in derivation chain

full rationale

The paper describes hardware-specific optimizations (warp specialization for asynchrony, interleaving of block matmul/softmax, and block FP8 quantization) for attention on H100 GPUs. All central claims—speedups of 1.5-2.0× reaching 740 TFLOPs/s (FP16) or 1.2 PFLOPs/s (FP8), plus 2.6× lower numerical error—are direct empirical measurements on hardware against explicit baselines. No equations, fitted parameters, or derivations are presented that could reduce to self-definition or self-citation. Prior FlashAttention citations supply background but are not invoked as uniqueness theorems or load-bearing justifications for the new results, which stand on external hardware benchmarks.

Axiom & Free-Parameter Ledger

0 free parameters · 2 axioms · 0 invented entities

The central claims rest on standard assumptions about linear-algebra correctness and hardware behavior rather than new free parameters or invented entities.

axioms (2)
  • domain assumption Matrix multiplication and softmax operations can be interleaved while preserving mathematical equivalence when properly synchronized.
    Invoked by the interleaving technique described in the abstract.
  • domain assumption Block quantization with incoherent processing preserves sufficient numerical fidelity for attention outputs.
    Required for the FP8 accuracy claim.

pith-pipeline@v0.9.0 · 5756 in / 1367 out tokens · 65561 ms · 2026-05-20T19:39:48.078510+00:00 · methodology

discussion (0)

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