The role of charge traps in inducing hysteresis: capacitance - voltage measurements on top gated bilayer graphene
classification
❄️ cond-mat.mtrl-sci
cond-mat.mes-hall
keywords
graphenehysteresiscapacitancechannelgategatedvoltageacross
read the original abstract
Understanding the origin of hysteresis in the channel resistance from top gated graphene transistors is important for transistor applications. Capacitance - voltage measurements across the gate oxide on top gated bilayer graphene show hysteresis with a charging and discharging time constant of ~100 {\mu}s. However, the measured capacitance across the graphene channel does not show any hysteresis, but shows an abrupt jump at a high channel voltage due to the emergence of an order, indicating that the origin of hysteresis between gate and source is due to charge traps present in the gate oxide and graphene interface.
This paper has not been read by Pith yet.
discussion (0)
Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.