Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Hierarchical memories: Simulating quantum LDPC codes with local gates
As of 20 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 5 inbound Pith citation observations for arXiv:2303.04798.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-19T06:32:44.657259+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-16T04:58:10.709658Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-23T22:38:32.363021Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 63c38131-6bfa-4f24-b1db-9c6011746f8e · inbound
Quantum memory based on concatenating surface codes and quantum Hamming codes cites this paper.
Quantum memory based on concatenating surface codes and quantum Hamming codes Hierarchical memories: Simulating quantum LDPC codes with local gates
Reference 41
- Resolution
- verified exact
- arxiv_id, observed 2026-05-23T22:38:32.366017Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.
Observation 530f6046-2dd9-452b-8c3f-140b463c0051 · inbound
Controller-decoder system requirements derived by implementing Shor's algorithm with surface code cites this paper.
Controller-decoder system requirements derived by implementing Shor's algorithm with surface code Hierarchical memories: Simulating quantum LDPC codes with local gates
Reference 69
- Resolution
- unresolved
- no resolver link, observed 2026-08-12T05:35:54.338144Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 43249413-91b2-4676-b8c0-d92bea4c312f · inbound
Erasure Minesweeper: exploring hybrid-erasure surface code architectures for efficient quantum error correction cites this paper.
Erasure Minesweeper: exploring hybrid-erasure surface code architectures for efficient quantum error correction Hierarchical memories: Simulating quantum LDPC codes with local gates
Reference 50
- Resolution
- unresolved
- no resolver link, observed 2026-08-16T04:58:10.709658Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 55965e2a-84b5-4147-b0c3-37ec577555e3 · inbound
Sequential decoding of the XYZ$^2$ hexagonal stabilizer code cites this paper.
Sequential decoding of the XYZ$^2$ hexagonal stabilizer code Hierarchical memories: Simulating quantum LDPC codes with local gates
Reference 26
- Resolution
- unresolved
- no resolver link, observed 2026-08-15T23:52:43.326828Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 5f45b975-85f4-4a8c-8862-7ff4d2397509 · inbound
Dynamics and rupture of doped Motility Induced Phase Peparation cites this paper.
Dynamics and rupture of doped Motility Induced Phase Peparation Hierarchical memories: Simulating quantum LDPC codes with local gates
Reference 28
- Resolution
- unresolved
- no resolver link, observed 2026-08-05T23:11:30.663109Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.