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Electrical Control over Volatile Mott Switching through Non-Volatile Memory Effects

T0 review · 2 major / 4 minor · reviewed 2026-08-03 · deepseek-v4-flash

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Pith's one-line read Volatile resistive switching in vanadium oxides carries a non-volatile memory that lowers the voltage of subsequent switches.

desk verdict Solid experimental paper that clearly separates two memory mechanisms in VO2/V2O3 volatile switches and demonstrates a practical tuning protocol; the main gap is direct confirmation of the defect species. read the letter →

arxiv 2607.28787 v1 pith:XZIGH23X submitted 2026-07-30 cond-mat.mtrl-sci

Amihai Kronman (1) , Gil Levi (1) , Yoav Kalcheim (1) ((1) Department of Materials Science , Engineering , Technion - Israel Institute of Technology , Haifa , Israel) This is my paper · ORCID
classification cond-mat.mtrl-sci
keywords volatileresistiveswitchingMottinsulatorvanadiumdioxide(VO2)sesquioxide(V2O3)metal-insulatortransitionelectroformingmemoryeffectsvoltagetuning
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper tries to establish that nominally volatile resistive switching in VO2 and V2O3 devices is not fully reversible: each switching event leaves a non-volatile trace that changes how easily the device switches next time. It identifies two distinct memory effects—one in V2O3's phase-coexistence region, where the first current sweep rearranges metallic and insulating domains and is erased by thermal cycling, and one at low temperatures in both oxides, where the field and current surge create or move defects that persist through thermal cycling. It further shows that if the surge is limited by an internal series resistor, this defect-based memory can be used as a gradual 'writing' procedure to tune switching voltage and power over a wide temperature range without structural damage. A sympathetic reader would care because it turns a known reliability nuisance—electroforming—into a controlled knob for programming threshold-switch parameters.

What carries the argument

The load-bearing mechanism is the self-modifying conducting filament: each volatile switch forms a metallic filament whose creation and annihilation leave a non-volatile trace—either a rearranged metallic-domain configuration in the phase-coexistence regime or a population of electrically generated or migrated defects at low temperature. The enabler for studying and harnessing this is an internal series resistor lithographically built into the device, which limits the current and capacitive-discharge surge after the sub-nanosecond switching event, preventing destructive melting or cracking while preserving a mild surge that can be used for controlled defect writing.

What would settle it

A nanoscale chemical and structural map of the filament region before and after a low-temperature write step: if no local oxygen-vacancy enrichment is found and the persistent voltage reduction instead correlates with trapped charge or twin-domain reconfiguration, the defect-based explanation would need major revision.

Watch

Extended reading notes

Core claim

The central claim is that ostensibly volatile switching in Mott-insulator devices is entangled with non-volatile material modification: the first switching event requires a higher voltage than subsequent events in both V2O3 and VO2, for two different reasons. In V2O3 near the phase-coexistence regime, the first sweep redistributes metallic domains so that a filament can form more easily later; this memory is erased by heating into the fully metallic state. At low temperatures in both oxides, the high field and current surge accompanying the first switch introduce a persistent defect-based state, most plausibly oxygen vacancies, that survives thermal cycling and lowers the switching voltage.

Load-bearing premise

The load-bearing premise is that the persistent low-temperature memory is caused by electrically created or migrated defects—most plausibly oxygen vacancies—along the filament path; the authors state that the microscopic nature and spatial localization of this state are not yet directly confirmed.

Editorial extensions

If this is right

  • The same device can be reprogrammed all-electrically: switching parameters at a chosen operating temperature can be set by low-temperature writing steps.
  • Gradual writing preserves the film's structural and Raman-verified phase integrity, whereas a single abrupt write step causes cracking and orders-of-magnitude resistance changes—so forming protocols, not just voltages, determine device outcome.
  • Because the low-temperature memory persists through thermal cycling, it cannot be attributed to metallic-domain redistribution or strain memory; it points to a defect-related state that requires nanoscale chemical and structural identification.
  • The feedback loop between volatile filament formation and non-volatile defect generation means repeated switching at low temperature gradually lowers the switching voltage, converting a single destructive electroforming event into a sequence of mild forming steps.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • If oxygen vacancies are indeed the stored state, then exposing written devices to an oxygen-rich annealing atmosphere should erase the low-temperature memory; this is a direct, testable consequence the paper leaves open.
  • The same gradual-writing protocol could in principle be ported to other threshold-switching materials—the authors note NbO2 and ovonic chalcogenides—where first-firing-voltage variability is a known problem.
  • The results imply that first-sweep behavior is not purely a nuisance: in surge-protected devices, the first sweep is effectively the first write operation, so circuit designers could treat it as an initialization step rather than a failure event.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

2 major / 4 minor

Summary. The paper reports memory effects in volatile resistive switches based on VO2 and V2O3 thin films. Using devices with an integrated internal series resistor to suppress current surges, the authors identify three temperature regimes: (i) a phase-coexistence-regime memory in V2O3, attributed to field-induced redistribution of metallic domains, which is erased by thermal cycling; (ii) an intermediate regime with no memory effect; and (iii) a low-temperature memory in both oxides, attributed to electrically induced defect formation/migration, which persists through thermal cycling. They further show that a gradual, multi-step low-temperature 'writing' protocol can reduce the switching voltage by a factor of about 2.5 and the switching power by about a factor of 6 without observable structural damage, whereas a single abrupt writing step leads to crack formation. The central claim is that nominally volatile switching is controllably modified by non-volatile processes occurring during the switching event.

Significance. If the mechanistic conclusions hold, the paper establishes a practically useful coupling between volatile filament dynamics and non-volatile material modification, with a concrete route to post-fabrication tuning of switching parameters in Mott-based threshold switches. The experimental design is a clear strength: the internal-resistor architecture enables repeatable low-temperature switching and provides quantitative surge estimates, while the thermal-cycling experiments and the comparison between gradual and sudden writing protocols give independent discriminators between candidate mechanisms. The authors also explicitly acknowledge the main limitation—the lack of direct nanoscale confirmation of the defect species and its spatial distribution. The work is therefore significant and well positioned, but its mechanistic claims go somewhat beyond the direct evidence.

major comments (2)
  1. [Results and Discussion] The low-temperature memory effect is attributed to electrically induced defect formation/migration, with oxygen vacancies identified as the 'most plausible candidates.' However, the manuscript itself states that 'the specific nature of this state is not clear' (Results) and that the interpretation 'remains to be confirmed by nanoscale chemical and structural characterization' (Discussion). The supporting evidence—persistence through thermal cycling (Fig. 4), stronger effect at lower temperature (Fig. 3), and qualitative similarity to mild annealing (S7)—is indirect. Because the Conclusions assert 'defect-mediated memory effect' and 'controlled defect introduction' as established mechanisms, this is a load-bearing claim. I recommend either providing direct chemical/structural evidence (e.g., STEM-EELS, X-ray nanoscopy, or controlled oxygen-environment annealing) or explicitly reframing th
  2. [Results, Fig. 3 and Discussion] The phase-coexistence memory in V2O3 is interpreted as arising from spatial redistribution of metallic/insulating domains. The thermal-cycling erasure (Fig. 4b) and the temperature dependence (Fig. 3) are consistent with this interpretation, but no direct imaging of the domain configuration before and after switching is provided. The authors themselves note that 'direct imaging... would help clarify' the proposed mechanism. Since this mechanism is one of the two pillars of the 'two distinct memory mechanisms' claim, the paper should more clearly separate this observation-based inference from a directly evidenced conclusion, or add imaging/data that directly probes the domain redistribution.
minor comments (4)
  1. [Results, paragraph after Fig. 7] The sentence 'Similar morphological changes could not be observed in V2O3, probably due to the limit on the lowest temperature accessible by our measurement setup, which could not exceed 200V' appears to contain a typo or unclear wording (likely 'could not go below 200 K' or 'could not exceed 200 K'). Please clarify.
  2. [Fig. 6] The 'switching power' reported in Fig. 6 is not explicitly defined in the main text. Please state whether it is the product of the switching voltage and the current at switching, and how it is extracted from the IV sweeps.
  3. [Fig. 3] The shaded regions for the three memory regimes overlap, and the caption notes that different devices exhibit different regimes in the overlapping ranges. It would be helpful to state the criterion used to assign a device to a regime and to show the number of devices and measurement repeats underlying each point.
  4. [Supplementary S3] The estimate of the V2O3 gap capacitance uses a static dielectric constant of about 5000, which likely applies near the phase transition. Since the low-temperature memory is measured deep in the insulating phase, the actual capacitance may be much smaller. The conclusion is robust, but the choice of εr and its temperature range should be justified or commented on.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the memory effects are established by the paper's own measurements, with independent mechanistic discriminators and explicit acknowledgment of unresolved defect identity.

full rationale

This is an experimental paper whose central claims are phenomenological, not derived from a fitted model or from a self-citation chain. The memory effect is defined operationally from consecutive IV sweeps (first-sweep switching voltage above subsequent sweeps), while the two mechanisms are identified using independent discriminators that are not used to define the mechanisms: temperature dependence along the independently measured R(T) cooling curve (Fig. 3), response to thermal cycling (Fig. 4), and absence of a memory effect in an intermediate temperature region that rules out a purely strain-based explanation. The low-temperature writing-protocol result is directly measured, with SEM and Raman controls showing that gradual writing tunes switching voltage and power without structural damage whereas sudden writing cracks the film (Figs. 6-7). No parameter is fitted to a subset of data and then renamed as a prediction; the 'threshold' linking writing efficacy to the defect-memory regime is a consistency check between two measured observables. Several references are from the same research group (e.g., refs 27, 34, 35, 43, 48, 50, 61), but none is load-bearing in a circular way: the claims they support are also backed by external references or by the paper's own data, and the paper does not invoke a self-citation as a uniqueness theorem or hidden ansatz. The paper explicitly flags the main unresolved point - the microscopic nature of the low-temperature defect state - with quotes such as 'the specific nature of this state is not clear' and 'Although the microscopic nature of the defects in this regime is unclear, oxygen vacancies are the most plausible candidates... this interpretation, however, remains to be confirmed by nanoscale chemical and structural characterization.' This is a well-stated evidentiary gap, not a circular step. The derivation chain therefore does not reduce to its inputs.

Assumptions & free parameters 1 free parameters · 4 assumptions · 1 invented entities

No theory is fitted to data: the central claims rest on measured IV and R(T) curves. The S3 surge-protection estimates use literature values (volumetric heat capacity, dielectric constants, thermal timescale) plus one hand-chosen value (50 pF cable capacitance); these are engineering estimates supporting the internal-resistor design rationale, not fitted parameters. The axioms listed are the domain assumptions on which the interpretation rests, the most fragile being the unconfirmed defect attribution.

free parameters (1)
  • Parasitic capacitance of external cabling, C_parasitic = 50 pF = 50 pF (assumed)
    Hand-chosen order-of-magnitude value in SI S3 used to argue that an external series resistor cannot prevent capacitive-discharge damage while an internal resistor can. It feeds the energetic estimate (delta T ~ 10^4 K), not the central experimental claims, which rest on measured IV/R(T) data.
assumptions (4)
  • domain assumption Filamentary switching picture: the IMT-driven resistance drop proceeds through formation of a metallic filamentary path across the gap (refs 33-36)
    The interpretation of all IV data and both memory mechanisms presumes current is carried by a local filament rather than a uniform transition. Cited prior work supports this; the paper does not image filaments in its own devices.
  • domain assumption The internal resistor remains in the high-resistance state and does not switch during gap switching
    If the internal resistor switched or became nonlinear, the voltage-subtraction extraction of the gap IV would be invalid. The paper verifies approximately linear, bias-independent behavior at one representative condition (Fig. S3.1, VO2 at 300 K) and assumes this holds across the temperature range.
  • domain assumption The three hypotheses (metallic-domain redistribution, defect formation, structural memory) span the possible mechanisms for the first-sweep memory effect
    The interpretation of the intermediate-regime null result as ruling out the structural memory hypothesis assumes the hypothesis space is exhaustive; other mechanisms (e.g., trapped charge, contact effects) are not discussed.
  • domain assumption Heating into the fully metallic state and re-cooling resets the domain configuration (used as the thermal-cycling erasure test)
    The thermal-cycling discrimination between domain-based and defect-based memory assumes the cycle fully erases domain memory; the paper shows return of Vsw to its original value in the phase-coexistence regime, consistent with this.
invented entities (1)
  • Oxygen vacancies as the mobilizable defect species mediating the low-temperature memory
    purpose: Explain the persistent, thermally-stable reduction of switching voltage after the first IV sweep and the writing-protocol tuning
    The paper explicitly states the microscopic nature of the defects is unclear and that oxygen vacancies are only 'the most plausible candidates'; the annealing analogy (S7) is indirect and self-referential within the paper. No direct nanoscale chemical or structural confirmation is provided, so no falsifiable handle outside the paper is given.

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Pith. "Pith review of Electrical Control over Volatile Mott Switching through Non-Volatile Memory Effects." pith.science (2026). https://pith.science/paper/XZIGH23X

@misc{pith2026260728787,
  author       = {Pith},
  title        = {Pith review of: Electrical Control over Volatile Mott Switching through Non-Volatile Memory Effects},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/XZIGH23X}},
  note         = {Machine review of arXiv:2607.28787}
}
read the original abstract

Vanadium Dioxide (VO2) and Vanadium Sesquioxide (V2O3) are Mott insulators that undergo an Insulator-to-Metal Transition (IMT) at ~340K and ~160K, respectively, manifested as an orders-of-magnitude reduction in their electrical resistance. These transitions provide the physical basis for their Volatile Resistive Switching (VRS) behavior, making them promising candidates for threshold-switching devices. Here, we show that the volatile switching in these materials can be strongly affected by non-volatile processes associated with the creation and annihilation of the conducting filament. These processes give rise to pronounced memory effects in which the initial switching voltage substantially exceeds that of subsequent cycles. We identify two distinct mechanisms underlying this behavior in different thermal regimes. In the phase-coexistence regime, a memory effect is observed in V2O3, arising from the spatial redistribution of metallic and insulating domains. Well below the hysteresis regime, an additional electroforming-like memory effect is observed in both VO2 and V2O3 which is attributed to the formation and/or migration of defects under the influence of a high electric field and a current surge associated with the IMT-driven switching. Using a protective internal resistor and a multi-step writing protocol, this normally destructive process can be harnessed to tune the switching voltage and power over a wide temperature range. These results demonstrate a route toward controlled programming of switching parameters in IMT-based resistive switching devices.

Figures

Figures reproduced from arXiv: 2607.28787 by the authors.

Figure 1
Figure 1. RT curves of the as-grown V2O3 and VO2 thin films. Inset: Optical micrograph of a fabricated device. The black arrows indicate the location of internal resistors, the upper resistor was used in this work. the narrower gap switches (supplementary figure S3.1). The proximity of the internal resistor to the gap greatly reduces the amount of parasitic capacitance, which strongly limits the current which flows through th… view at source ↗
Figure 2
Figure 2. Memory effect in (a) V2O3 (T=110K) and (b) VO2 (T=250K) devices after incorporating an internal resistor. The inset shows the extracted switching voltage from each IV sweep. effect originates from a change in the spatial distribution of metallic domains following the first IV sweep. Within the phase-coexistence regime, metallic and insulating domains coexist thermodynamically, and the creation and annihilation of th… view at source ↗
Figure 3
Figure 3. Relative change between the switching voltage of the 1st sweep and subsequent sweeps, defined as Vsw,1−Vsw,2 Vsw,2 , calculated for different temperatures for (a) V2O3 and (b) VO2. (c-d) The RT curves of the respective films with the location on the cooling curve of the IV measurements temperatures highlighted. Shaded regions denote the different memory regimes, as indicated in the legend. Overlapping regions mark t… view at source ↗
Figures from the paper (5 more)
Figure 4
Figure 4. Figure 4: Effect of thermal cycling on the observed memory effect at (a) low temperatures (T=110K) in the fully insulating state and at (b) high temperature (T=155K) in the phase coexistence regime in V2O3 devices. The response to thermal cycling provides a direct way to disting…
Figure 5
Figure 5. Figure 5: Schematic of the mechanism of two memory effects observed in VOx devices: (a-d) The domain redistribution memory - the pristine state contains a certain fraction of metallic domains, following the 1st IV, the domains rearrange in the filament path, lowering the voltage…
Figure 6
Figure 6. Figure 6: The switching voltage and power at the operating temperature after each step of measuring IV at a lower temperature (’writing’) in (a) V2O3 and (b) VO2. The writing procedure is cumulative: each writing step is performed after all preceding writing steps at higher temp…
Figure 7
Figure 7. Figure 7: (a-b) Comparison of the R(T) curves of a VO2 device before and after (a) cumulative writing procedure and (b) sudden writing procedure. The red curve in (a) overlap with the orange one, as no change in the RT curve was measured after this writing step. (c-d) SEM microg…
Figure 8
Figure 8. Figure 8: Comparison of the Raman spectra of a pristine device and devices after cumulative writing and sudden writing procedures. DISCUSSION The observations presented here reveal a regime-dependent relation between volatile filament dynamics and non-volatile material modificat…

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Pith tools

Reviewed August 3, 2026 · model on record in the stance chip above.