Agents that route PCBs through KiCad's native API with design-rule feedback outperform grid-action RL and open-loop LLM baselines, and a synthetic-trained PPO transfers zero-shot to real boards.
In2025 ACM/IEEE 7th Symposium on Machine Learning for CAD (MLCAD)
7 Pith papers cite this work, alongside 4 external citations. Polarity classification is still indexing.
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2026 7representative citing papers
A co-evolutionary method evolves LLM prompts and circuits to produce 8-bit approximate multipliers with better error-area trade-offs than EvoApproxLib.
RTLScout combines LLM-driven agentic RTL code optimization with synthesis and architecture sweeps to achieve 35% area and 45% delay reductions on a 16-bit IEEE-754 floating-point multiplier compared to baseline designs in ASAP7 technology.
DiagramNet supplies a new multimodal dataset and progressive training pipeline with decoupled multi-agent workflow, allowing a 3B model to outperform GPT-5, Claude-Sonnet-4, and Gemini-2.5-Pro by over 2x on system-level diagram tasks while generalizing to other benchmarks.
CHIA is a distributed graph-based framework for composing, deploying, and verifying agentic AI hardware/software co-design flows, demonstrated on RTL, simulation, and compiler tasks.
HighTide presents an evolving AI-curated open-source VLSI benchmark suite spanning design languages and nodes, with Bazel-based RTL-to-GDS flows, twelve agent skills, and per-design decision logs.
ATLAS uses large language models to automatically generate formal security properties from threat models and vulnerability databases, detecting 39 of 48 CWEs and producing correct assertions for 33 on three HACK@DAC benchmarks.
citing papers explorer
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PCBWorld: A Benchmark Environment for Engine-Grounded PCB Design Automation
Agents that route PCBs through KiCad's native API with design-rule feedback outperform grid-action RL and open-loop LLM baselines, and a synthetic-trained PPO transfers zero-shot to real boards.
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Multi-Objective Coevolution of Prompts and Templates for Circuit Approximation
A co-evolutionary method evolves LLM prompts and circuits to produce 8-bit approximate multipliers with better error-area trade-offs than EvoApproxLib.
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RTLScout: Joint Agentic Code and Synthesis Optimization for Efficient Digital Circuits
RTLScout combines LLM-driven agentic RTL code optimization with synthesis and architecture sweeps to achieve 35% area and 45% delay reductions on a 16-bit IEEE-754 floating-point multiplier compared to baseline designs in ASAP7 technology.
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DiagramNet: An End-to-End Recognition Framework and Dataset for Non-Standard System-Level Diagrams
DiagramNet supplies a new multimodal dataset and progressive training pipeline with decoupled multi-agent workflow, allowing a 3B model to outperform GPT-5, Claude-Sonnet-4, and Gemini-2.5-Pro by over 2x on system-level diagram tasks while generalizing to other benchmarks.
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CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research
CHIA is a distributed graph-based framework for composing, deploying, and verifying agentic AI hardware/software co-design flows, demonstrated on RTL, simulation, and compiler tasks.
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HighTide: An Agent-Curated Open-Source VLSI Benchmark Suite
HighTide presents an evolving AI-curated open-source VLSI benchmark suite spanning design languages and nodes, with Bazel-based RTL-to-GDS flows, twelve agent skills, and per-design decision logs.
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ATLAS: AI-Assisted Threat-to-Assertion Learning for System-on-Chip Security Verification
ATLAS uses large language models to automatically generate formal security properties from threat models and vulnerability databases, detecting 39 of 48 CWEs and producing correct assertions for 33 on three HACK@DAC benchmarks.