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Stochastic thermodynamic bounds on logical circuit operation

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arxiv 2211.00670 v3 pith:XX7UOBRL submitted 2022-11-01 cond-mat.stat-mech cond-mat.mes-hallphysics.chem-ph

classification cond-mat.stat-mechcond-mat.mes-hallphysics.chem-ph
keywords certaintytimecyclefindheatmemoryoperationthermodynamic
verification ladder T0 review T1 audit T2 compute T3 formal
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Using a thermodynamically consistent, mesoscopic model for modern complementary metal-oxide-semiconductor transistors, we study an array of logical circuits and explore how their function is constrained by recent thermodynamic uncertainty relations when operating near thermal energies. For a single NOT gate, we find operating direction-dependent dynamics, and a trade-off between dissipated heat and operation time certainty. For a memory storage device, we find an exponential relationship between the memory retention time and energy required to sustain that memory state. For a clock, we find that the certainty in the cycle time is maximized at biasing voltages near thermal energy, as is the trade-off between this certainty and the heat dissipated per cycle. We identify a control mechanism that can increase the cycle time certainty without an offsetting increase in heat dissipation by working at a resonance condition for the clock. These results provide a framework for assessing thermodynamic costs of realistic computing devices, allowing for circuits to be designed and controlled for thermodynamically optimal operation.

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