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Ultra-steep slope cryogenic FETs based on bilayer graphene

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arxiv 2408.01111 v1 pith:BWUQZDSC submitted 2024-08-02 cond-mat.mes-hall cond-mat.mtrl-sci

Ultra-steep slope cryogenic FETs based on bilayer graphene

classification cond-mat.mes-hall cond-mat.mtrl-sci
keywords fetscryogenicslopessubthresholdbilayerbulkgrapheneinverse
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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Cryogenic field-effect transistors (FETs) offer great potential for a wide range of applications, the most notable example being classical control electronics for quantum information processors. In the latter context, on-chip FETs with low power consumption are a crucial requirement. This, in turn, requires operating voltages in the millivolt range, which are only achievable in devices with ultra-steep subthreshold slopes. However, in conventional cryogenic metal-oxide-semiconductor (MOS)FETs based on bulk material, the experimentally achieved inverse subthreshold slopes saturate around a few mV/dec due to disorder and charged defects at the MOS interface. FETs based on two-dimensional materials offer a promising alternative. Here, we show that FETs based on Bernal stacked bilayer graphene encapsulated in hexagonal boron nitride and graphite gates exhibit inverse subthreshold slopes of down to 250 ${\mu}$V/dec at 0.1 K, approaching the Boltzmann limit. This result indicates an effective suppression of band tailing in van-der-Waals heterostructures without bulk interfaces, leading to superior device performance at cryogenic temperature.

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