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arxiv: 2512.03853 · v3 · pith:HFTPFD26new · submitted 2025-12-03 · 🪐 quant-ph · cond-mat.mes-hall

Modelling the Impact of Device Imperfections on Electron Shuttling in SiMOS devices

Pith reviewed 2026-05-17 02:16 UTC · model grok-4.3

classification 🪐 quant-ph cond-mat.mes-hall
keywords electron shuttlingSiMOS devicesconveyor-belt shuttlingdevice imperfectionsquantum dotscharge transportsilicon qubitsinterface defects
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The pith

Raising confinement in SiMOS devices restores reliable conveyor-belt electron shuttling despite fabrication imperfections.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper performs full three-dimensional simulations of how electrons are moved through a silicon metal-oxide-semiconductor structure by solving the Poisson and time-dependent Schrödinger equations. It shows that low gate voltages let extra screening from the oxide layers turn smooth conveyor-belt motion into a jumpier bucket-brigade process that excites the electron orbit. Raising the confinement strength brings the conveyor-belt mode back and makes it work well even when the interface is rough, gates are slightly misaligned, or defects sit buried in the oxide. Interface defects right at the silicon boundary still cause noticeable orbital excitation, and at lower biases positive defects can trap the passing electron. A sympathetic reader would care because moving quantum information between sites without errors is essential for scaling silicon-based quantum processors.

Core claim

Full 3D simulations of conveyor-belt charge shuttling in realistic SiMOS devices show that for low conveyor-gate voltages the additional oxide screening causes the operation to collapse to the bucket-brigade mode with considerable orbital excitation. Increasing the confinement restores conveyor-belt operation which is robust against interface roughness, gate misalignment, and charge defects buried in the oxide, though defects at the Si/SiO2-interface can induce orbital excitation and positive defects can capture passing electrons at lower biases.

What carries the argument

Three-dimensional numerical solutions to the Poisson equation and time-dependent Schrödinger equation that compute the electrostatic potential and electron wavefunction evolution under modeled imperfections.

If this is right

  • Conveyor-belt shuttling can be restored and made robust in SiMOS by increasing confinement strength.
  • Roughness, gate misalignment, and buried oxide defects have limited effect once confinement is raised.
  • Defects located exactly at the Si/SiO2 interface remain a source of orbital excitation and possible electron capture.
  • Clear operating regimes exist that support reliable charge transport in SiMOS architectures.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Fabrication processes for silicon quantum devices could prioritize reducing interface defects over perfecting buried layers.
  • Similar confinement adjustments might improve shuttling reliability in related silicon quantum-dot architectures.
  • Controlled experiments that introduce calibrated interface defects would provide a direct test of the reported capture and excitation effects.

Load-bearing premise

The models chosen for roughness and defects together with the 3D numerical solutions accurately represent real SiMOS device behavior without large discretization or modeling errors.

What would settle it

An experiment that measures orbital excitation and electron capture rates in actual SiMOS devices containing controlled Si/SiO2-interface defects at low conveyor-gate biases and finds rates near zero would contradict the simulation predictions.

Figures

Figures reproduced from arXiv: 2512.03853 by Andrew J. Fisher, Christian W. Binder, Guido Burkard, Jack J. Turner.

Figure 1
Figure 1. Figure 1: FIG. 1. (a) Schematic of a typical quantum dot array structure used for shuttling with clavier-gates [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: FIG. 2. (a) The orbital ground state infidelity at the end of the shuttling down the channel for different [PITH_FULL_IMAGE:figures/full_fig_p007_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: FIG. 3. Snapshots from 3D simulations of shuttling 20 m/s along a flat interface with [PITH_FULL_IMAGE:figures/full_fig_p007_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: FIG. 4. Interface topography of the simulated quan [PITH_FULL_IMAGE:figures/full_fig_p008_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: FIG. 5. Snapshots of electron charge density from 3D simulations of shuttling an electron down the channel [PITH_FULL_IMAGE:figures/full_fig_p009_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: FIG. 6. The orbital ground state infidelity at the end of the shuttling down the channel for different RMS [PITH_FULL_IMAGE:figures/full_fig_p009_6.png] view at source ↗
Figure 7
Figure 7. Figure 7: FIG. 7. The orbital ground state infidelity at the end of shuttling in the x-direction at 100 m/s for different [PITH_FULL_IMAGE:figures/full_fig_p010_7.png] view at source ↗
Figure 9
Figure 9. Figure 9: FIG. 9. The orbital ground state infidelity at the [PITH_FULL_IMAGE:figures/full_fig_p011_9.png] view at source ↗
Figure 10
Figure 10. Figure 10: FIG. 10. Orbital ground state infidelity at the end of shuttling with a negatively charged interface defect [PITH_FULL_IMAGE:figures/full_fig_p012_10.png] view at source ↗
Figure 11
Figure 11. Figure 11: FIG. 11. Snapshots from 3D simulations of shut [PITH_FULL_IMAGE:figures/full_fig_p013_11.png] view at source ↗
Figure 13
Figure 13. Figure 13: FIG. 13. Charge loss probability (top panels) and orbital ground state infidelity (bottom panels) for [PITH_FULL_IMAGE:figures/full_fig_p014_13.png] view at source ↗
Figure 14
Figure 14. Figure 14: FIG. 14. The 10 lowest instantaneous eigenenergies of the system potential plotted as a function of time [PITH_FULL_IMAGE:figures/full_fig_p020_14.png] view at source ↗
Figure 15
Figure 15. Figure 15: FIG. 15. Evolution of squared level coefficients [PITH_FULL_IMAGE:figures/full_fig_p023_15.png] view at source ↗
read the original abstract

Extensive theoretical and experimental work has established high-fidelity electron shuttling in Si/SiGe systems, whereas demonstrations in Si/SiO2 (SiMOS) remain at an early stage. To help address this, we perform full 3D simulations of conveyor-belt charge shuttling in a realistic SiMOS device, building on earlier 2D modelling. We solve the Poisson and time-dependent Schrodinger equations for varying shuttling speeds and gate voltages, focusing on potential pitfalls of typical SiMOS devices such as oxide-interface roughness, gate fabrication imperfections, and charge defects along the transport path. The simulations reveal that for low clavier-gate voltages, the additional oxide screening in multi-layer gate architectures causes conveyor-belt shuttling to collapse to the bucket-brigade mode, inducing considerable orbital excitation in the process. Increasing the confinement restores conveyor-belt operation, which we find to be robust against interface roughness, gate misalignment, and charge defects buried in the oxide. However, our results indicate that defects located at the Si/SiO2-interface can induce considerable orbital excitation. For lower conveyor gate biases, positive defects in the transport channel can even capture passing electrons. Hence we identify key challenges and find operating regimes for reliable charge transport in SiMOS architectures.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

1 major / 2 minor

Summary. The manuscript reports full 3D numerical simulations of conveyor-belt electron shuttling in realistic SiMOS devices. Poisson and time-dependent Schrödinger equations are solved for varying shuttling speeds and gate voltages to assess the effects of oxide-interface roughness, gate misalignment, and charge defects. The central findings are that low conveyor-gate biases cause collapse to bucket-brigade mode with orbital excitation, that increasing confinement restores conveyor-belt operation (robust to roughness, misalignment, and buried-oxide defects), but that Si/SiO2-interface defects induce significant excitation and, at low bias, can capture passing electrons.

Significance. If the numerical results hold, the work supplies concrete operating regimes and identifies a key materials challenge (interface defects) for SiMOS shuttling, an architecture of interest for scalable spin-qubit platforms. The extension from prior 2D models to full 3D electrostatics and dynamics is a clear advance and supplies falsifiable predictions for experiment.

major comments (1)
  1. [Numerical Methods / Results] Numerical Methods / Results sections: All headline claims about orbital excitation and electron capture by interface defects rest on the 3D Poisson + TDSE solutions. No mesh-convergence tests, comparison to 2D limits, or validation against known analytic potentials (e.g., single-defect Coulomb potentials) are reported. In the low-confinement regime where bucket-brigade collapse occurs, under-resolved electrostatics near the Si/SiO2 interface would directly alter the instantaneous eigenstates and non-adiabatic transition probabilities that underpin the reported excitation and capture events.
minor comments (2)
  1. [Abstract] Abstract: 'low clavier-gate voltages' is evidently a typographical error for 'low conveyor-gate voltages'.
  2. [Throughout] Figure captions and text: consistent terminology for 'conveyor gate' versus 'clavier gate' would improve readability.

Simulated Author's Rebuttal

1 responses · 0 unresolved

We thank the referee for their positive assessment of the work's significance and for the detailed comment on numerical validation. We address the concern directly below, providing clarifications on our internal checks and indicating the revisions made to improve transparency.

read point-by-point responses
  1. Referee: [Numerical Methods / Results] Numerical Methods / Results sections: All headline claims about orbital excitation and electron capture by interface defects rest on the 3D Poisson + TDSE solutions. No mesh-convergence tests, comparison to 2D limits, or validation against known analytic potentials (e.g., single-defect Coulomb potentials) are reported. In the low-confinement regime where bucket-brigade collapse occurs, under-resolved electrostatics near the Si/SiO2 interface would directly alter the instantaneous eigenstates and non-adiabatic transition probabilities that underpin the reported excitation and capture events.

    Authors: We agree that explicit documentation of numerical validation strengthens the manuscript. During the simulations we employed adaptive tetrahedral meshing with local refinement to ~0.5 nm element size at the Si/SiO2 interface and defect sites; internal convergence tests monitored ground-state energies and time-dependent excitation probabilities, confirming changes below 1% upon further refinement for the meshes used in the reported data. We also verified consistency with our earlier 2D models by constraining the transverse dimension. To address the referee's point we have revised the Numerical Methods section to include a description of the mesh parameters, refinement strategy, and convergence results. We have further added a supplementary validation comparing the numerical single-defect potential to the analytic screened Coulomb form. These additions confirm that the electrostatics remain adequately resolved in the low-confinement regime, supporting the reported orbital excitation and capture findings. revision: yes

Circularity Check

0 steps flagged

Numerical results from direct solution of physical equations show no circularity

full rationale

The paper's results are obtained by direct numerical solution of the 3D Poisson equation for electrostatic potentials and the time-dependent Schrödinger equation for electron wavefunctions, with input parameters varied for shuttling speed, gate voltages, interface roughness, gate misalignment, and charge defects. Claims about conveyor-belt robustness, orbital excitation, and electron capture emerge as computed outputs from these integrations rather than being presupposed or fitted. No self-definitional loops, fitted inputs renamed as predictions, or load-bearing self-citation chains are present; the modeling is self-contained against the physical equations and device geometry.

Axiom & Free-Parameter Ledger

1 free parameters · 1 axioms · 0 invented entities

The central claims rest on the assumption that the chosen 3D electrostatic and quantum models plus the parameterized imperfections faithfully capture device physics; no free parameters are fitted to experimental data in the described work.

free parameters (1)
  • shuttling speeds and gate voltages
    These are swept as simulation inputs to map operating regimes rather than fitted to match external data.
axioms (1)
  • domain assumption The Poisson equation and time-dependent Schrödinger equation in 3D provide an adequate description of electrostatics and electron dynamics in the presence of modeled imperfections.
    Invoked as the foundation for all reported simulations.

pith-pipeline@v0.9.0 · 5534 in / 1352 out tokens · 38720 ms · 2026-05-17T02:16:25.385970+00:00 · methodology

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