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Security Analysis of the Silver Bullet Technique for RowHammer Prevention
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Security Analysis of the Silver Bullet Technique for RowHammer Prevention
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The purpose of this document is to study the security properties of the Silver Bullet algorithm against worst-case RowHammer attacks. We mathematically demonstrate that Silver Bullet, when properly configured and implemented in a DRAM chip, can securely prevent RowHammer attacks. The demonstration focuses on the most representative implementation of Silver Bullet, the patent claiming many implementation possibilities not covered in this demonstration. Our study concludes that Silver Bullet is a promising RowHammer prevention mechanism that can be configured to operate securely against RowHammer attacks at various efficiency-area tradeoff points, supporting relatively small hammer count values (e.g., 1000) and Silver Bullet table sizes (e.g., 1.06KB).
Forward citations
Cited by 6 Pith papers
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PVAC: A RowHammer Mitigation Architecture Exploiting Per-victim-row Counting
PVAC mitigates RowHammer by incrementing counters on victim rows and resetting them on activation via a parallel counter subarray, avoiding PRAC's saturation and timing penalties while supporting higher hammering tolerance.
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ColumnKeeper: Efficient Solutions to the ColumnDisturb Vulnerability in DRAM-based Systems
ColumnKeeper provides the first mitigations for ColumnDisturb using per-subarray counters or probabilistic refresh, with low overheads at 1M and 128K thresholds.
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DejaVu: Why You Should Write to Your DRAM Rows Twice, Carefully
DejaVu is a newly characterized data-pattern effect in commercial DDR4 DRAM where double-writing rows alters read-disturbance bitflip thresholds, shown across 112 chips and with implications for PUD operations.
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ScaleDisturb: Exploiting Temporal Asymmetry to Amplify Read Disturbance in Modern DRAM Chips
ScaleDisturb amplifies DRAM read disturbance via asymmetric aggressor row open times, inducing bitflips at fewer activations than prior patterns across 196 DDR4 and 3 HBM2 chips.
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Loaded Dice: Solving the Non-Selection Problem for Scalable Probabilistic RowHammer Defense
PrISM uses a Sampled History Queue to correlate row samples across windows, solving the non-selection problem in probabilistic RowHammer mitigation and cutting slowdown from 10.7% to 1.5% at threshold 250 versus prior...
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CODA: How to Mitigate ColumnDisturb for (Almost) Free?
CODA reduces required adjacent-counter increments for inter-subarray ColumnDisturb protection by 12x–1300x, restoring SALT/Ganged-SALT and REGA to near-zero slowdown and power overhead.
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