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2D Metal Selenide-Silicon Steep Sub-Threshold Heterojunction Triodes with High On-Current Density

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arxiv 2111.06396 v1 pith:TH675WUF submitted 2021-11-11 physics.app-ph cond-mat.mes-hallcond-mat.mtrl-scicond-mat.other

2D Metal Selenide-Silicon Steep Sub-Threshold Heterojunction Triodes with High On-Current Density

classification physics.app-ph cond-mat.mes-hallcond-mat.mtrl-scicond-mat.other
keywords currentdensityheterojunctiontfetsdeviceshighoperationpower
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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Low power consumption in both static and dynamic modes of operation is a key requirement in modern, highly scaled nanoelectronics. Tunneling field-effect transistors (TFETs) that exploit direct band-to-band tunneling of charges and exhibit steep sub-threshold slope (SS) transfer characteristics are an attractive option in this regard. However, current generation of Si and III-V heterojunction based TFETs while suffer from low ON current density and ON/OFF current ratios for < 60 mV/dec operation. Semiconducting two-dimensional (2D) layers have recently renewed enthusiasm in novel device design for TFETs not only because of their atomically-thin bodies that favor superior electrostatic control but the same feature also favors higher ON current density and consequently high ON/OFF ratio. Here, we demonstrate gate-tunable heterojunction diodes (triodes) fabricated from InSe/Si 2D/3D van der Waals heterostructures, with a minimum subthreshold swing (SS) as low as 6.4 mV/dec and an SS average of 30 mV/dec over 4 decades of current. Further, the devices show a large current on/off ratio of approximately 10^6 and on-state current density of 0.3 uA/um at a drain bias of -1V. Our work opens new avenues for 2D semiconductors for 3D hetero-integration with Si to achieve ultra-low power logic devices.

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