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Reconfigurable Compute-In-Memory on Field-Programmable Ferroelectric Diodes

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arxiv 2202.05259 v2 pith:D3HIEDWG submitted 2022-02-10 physics.app-ph cond-mat.dis-nncond-mat.mes-hallcond-mat.mtrl-sci

Reconfigurable Compute-In-Memory on Field-Programmable Ferroelectric Diodes

classification physics.app-ph cond-mat.dis-nncond-mat.mes-hallcond-mat.mtrl-sci
keywords operationsfedscompute-in-memorydatadata-centricdevicesdiodesferroelectric
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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The deluge of sensors and data generating devices has driven a paradigm shift in modern computing from arithmetic-logic centric to data-centric processing. Data-centric processing require innovations at device level to enable novel compute-in-memory (CIM) operations. A key challenge in construction of CIM architectures is the conflicting trade-off between the performance and their flexibility for various essential data operations. Here, we present a transistor-free CIM architecture that permits storage, search and neural network operations on sub-50nm thick Aluminum Scandium Nitride ferroelectric diodes (FeDs). Our circuit designs and devices can be directly integrated on top of Silicon microprocessors in a scalable process. By leveraging the field-programmability, non-volatility and non-linearity of FeDs, search operations are demonstrated with a cell footprint < 0.12 um2 when projected onto 45-nm node technology. We further demonstrate neural network operations with 4-bit operation using FeDs. Our results highlight FeDs as candidates for efficient and multifunctional CIM platforms.

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